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Storage and calculation multiplexing static storage unit

A static storage and transistor technology, applied in static storage, information storage, digital storage information, etc., can solve the problems of power consumption and data handling, and achieve the effect of improving data processing capacity and small circuit area

Pending Publication Date: 2021-05-25
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

A large part of the power consumption is spent on data handling of memory and computing units

Method used

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  • Storage and calculation multiplexing static storage unit
  • Storage and calculation multiplexing static storage unit
  • Storage and calculation multiplexing static storage unit

Examples

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Embodiment Construction

[0009] The specific implementation of the static storage unit for storage and calculation multiplexing provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0010] attached figure 1 Shown is a circuit diagram of a specific embodiment of the present invention, including: a first inverter and a second inverter arranged on top, the first inverter includes a first N-type transistor N1 and a second P-type transistor P2, the second inverter includes a second N-type transistor N2 and a third P-type transistor P3; the first P-type transistor P1 and the second P-type transistor P2 are symmetrically arranged with a common source and drain; the fourth P-type transistor P4 It is arranged symmetrically with the common source and drain of the third P-type transistor P3. The drains of the transistors P1 to P4 are connected to the working voltage. The fifth N-type transistor N5 and the sixth N-type transistor N6 are arranged in ...

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Abstract

The invention provides a storage and calculation multiplexing static memory cell. Input signal configuration can be selected from any one of memory configuration and comparator configuration. By multiplexing a part of transistors, the storage multiplexing of the comparator and the memory is realized through a smaller circuit area, and the data processing capability of the storage integrated system is improved.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a static storage unit with storage and calculation multiplexing. Background technique [0002] With the development of the big data era, artificial intelligence has become a very important subject area, and the neural network dedicated chip is an important hardware tool for the computing system to efficiently complete the neural network calculation. The traditional computing architecture adopts the von Neumann architecture that separates computing and storage. Under the trend of big data, memory bandwidth and memory power consumption in the von Neumann architecture have begun to dominate computing bandwidth and energy. A large part of the power consumption is spent on data handling of memory and computing units. Memory-oriented in-memory computing, through the combination of neural network algorithms and storage hardware architecture, greatly reduces the huge time and po...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/412G11C11/417H01L27/11H10B10/00
CPCG11C11/412G11C11/417H10B10/12
Inventor 陈静赵瑞勇谢甜甜王青吕迎欢
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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