High-energy-efficiency on-chip memory error detection and correction circuit and implementation method

Abstract

The invention discloses a high-energy-efficiency on-chip memory error detection and correction circuit and an implementation method. The circuit comprises an ECC code selection and generation module which is used for determining whether to carry out ECC coding or not according to the information in a memory access request sent by a memory access operation, carrying out ECC coding on memory access data ECC coding effective bits, and sending the memory access information and related ECC coding results to a subsequent memory access decoding module; a memory access decoding module and a redundant data memory, wherein the memory access decoding module is used for performing memory access decoding and generating a memory access port signal of the redundant data memory; a read-out data decoding error correction module, which is used for carrying out error detection and error correction on the ECC codes; and a read data selection module used for selecting read data according to the memory access address and the memory access granularity information sent along with the memory access pipeline. The implementation method is used for implementing the circuit. The method has the advantages that the area of an on-chip memory and the implementation area of an ECC circuit can be remarkably reduced, and the overall power consumption of the microprocessor is effectively reduced.

Description

technical field

[0001] The invention mainly relates to the field of microprocessor microarchitecture, in particular to an error detection and correction (Error Checking and Correction, ECC) circuit and implementation method of an on-chip memory in a microprocessor. Background technique

[0002] The on-chip memory is an important part of the microprocessor, and efficient and reliable data access is a key factor for its normal operation. On the one hand, with the continuous shrinking of the size of the semiconductor process, the integration density of chip transistors continues to increase, and the distance between semiconductor storage units decreases with the increase in the density of storage units, and the storage units are more susceptible to interference from the environment and space radiation particles. Due to the soft error caused by the single event flip event, the probability of the operation error of the entire chip is greatly increased. Therefore, the development ...

Examples

Embodiment Construction

[0036] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0037] Such as figure 1 As shown, the energy-efficient on-chip memory error detection and error correction circuit of the present invention, according to the memory access process, includes:

[0038] The ECC encoding selection and generation module is used to determine whether to perform ECC encoding according to the information in the access request issued by the access operation, perform ECC encoding on the effective bits of the ECC encoding of the access data, and combine the access information and related ECC encoding results Send it to the subsequent memory access decoding module;

[0039] A memory access decoding module and a redundant data memory, the memory access decoding module is used to perform memory access decoding according to read and write requests and memory access addresses, and generate redundant data memory memor...

technical field

[0001] The invention mainly relates to the field of microprocessor microarchitecture, in particular to an error detection and correction (Error Checking and Correction, ECC) circuit and implementation method of an on-chip memory in a microprocessor. Background technique

[0002] The on-chip memory is an important part of the microprocessor, and efficient and reliable data access is a key factor for its normal operation. On the one hand, with the continuous shrinking of the size of the semiconductor process, the integration density of chip transistors continues to increase, and the distance between semiconductor storage units decreases with the increase in the density of storage units, and the storage units are more susceptible to interference from the environment and space radiation particles. Due to the soft error caused by the single event flip event, the probability of the operation error of the entire chip is greatly increased. Therefore, the development ...

Examples

Embodiment Construction

[0036] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0037] Such as figure 1 As shown, the energy-efficient on-chip memory error detection and error correction circuit of the present invention, according to the memory access process, includes:

[0038] The ECC encoding selection and generation module is used to determine whether to perform ECC encoding according to the information in the access request issued by the access operation, perform ECC encoding on the effective bits of the ECC encoding of the access data, and combine the access information and related ECC encoding results Send it to the subsequent memory access decoding module;

[0039] A memory access decoding module and a redundant data memory, the memory access decoding module is used to perform memory access decoding according to read and write requests and memory access addresses, and generate redundant data memory memor...

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