Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the steps of providing a substrate; forming a semiconductor column on the substrate; forming a side wall layer on the side wall of the semiconductor column; etching the substrate exposed from the side wall layer and the semiconductor column, and forming a groove in the substrate; forming a first doping layer in the groove; and after the groove is formed, forming a second doping layer on the top of the semiconductor column. According to the embodiment of the invention, the side wall layer has a thickness, so that the side wall layer enables the side wall of the groove to keep a certain distance from the side wall of the semiconductor column, and the side wall of the groove has a certain distance from the side wall of the semiconductor column and the bottom surface of the semiconductor column. The first doping layer is formed in the groove, so that doping ions in the first doping layer are not easy to diffuse into the semiconductor column, a depletion layer of the first doping layer is not easy to expand when the semiconductor structure works, the short channel effect of the semiconductor structure is improved, and the performance of the semiconductor structure is optimized.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density and higher integration, and the development trend of semiconductor process nodes following Moore's Law continues to decrease. Transistors, as the most basic semiconductor devices, are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, in order to adapt to the reduction of process nodes, the channel length of transistors has to be continuously shortened. [0003] The shortening of the channel length of the transistor has the advantages of increasing the die density of the chip and increasing the switching speed. However, with the shortening of the channel length, the distance bet...

AI Technical Summary

Problems solved by technology

However, with the shortening of the channel length, the distance between the source and the drain of the transistor is also shortened, and the control ability of the gate to the channel becomes worse, resulting in the phenomenon of subthreshold leakage, the so-called short channel The short-channel effects (SCE) are more likely to occur, and the channel leakage current of the transistor increases

Images