Method for scrapping inner-layer circuit of printed board
A technology for inner layer circuits and printed boards, which is applied in the field of scrapping inner layer circuits of printed boards, and can solve problems such as on-off screening of electronic tests
Pending Publication Date: 2021-08-20
泰和电路科技(惠州)有限公司
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Problems solved by technology
[0003] For printed boards with a shielding layer, one end of the shielding layer is non-conductive. When the circuit of the shielding layer is open or short circuited, the electronic test continuity cannot be screened out through the resistance test, which will cause problems in the production process. Yield Screening Presents Challenges
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[0017] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the embodiments of the present invention. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0018] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relationship between the components in a certain posture (as shown in the accompanying drawings). Relative positional relationship, movement conditions, etc., if the specific posture changes, the directional indication will also change accordingly.
[0019] In addition, in the present invention,...
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The invention discloses a method for scrapping an inner-layer circuit of a printed board. The method comprises the following steps of 1, providing a printed board which comprises a circuit layer, enabling the circuit layer to comprise a bonding pad and a test module, enabling the test module to comprise a connecting wire connected with the bonding pad, and enabling the test module to take the bonding pad as a test port, 2, performing resistance test on the two test ports through the test module, and when the resistance is less than or equal to 20 ohms, judging that the circuit layer is a closed circuit, and determining that the circuit layer is qualified, when the resistance is larger than or equal to 5 Momega and smaller than or equal to 100 Momega, judging that an open circuit is formed, determining the circuit layer to be unqualified, and executing the third step, and 3, trimming off connecting wires of the test modules in the unqualified circuit layer. The method has the advantages that the test module is additionally arranged in the circuit layer, the resistance between the bonding pads of the circuit layer is tested through the test module, so that the unqualified circuit layer is screened out, then the test module is controlled to trim off and scrap the unqualified circuit layer, and whether each circuit layer in the printed circuit board is qualified or not is accurately screened out.
Description
【Technical field】 [0001] The invention relates to the technical field of switching power supplies, in particular to a method for scrapping inner-layer circuits of printed boards. 【Background technique】 [0002] With the development trend of high frequency and miniaturization of switching power supply, the switching speed is increased, the layout of PCB (Print Circuit Board, printed circuit board) is more compact, and the electromagnetic interference (Electromagnetic Interference, EMI) generated by the switching action of semiconductor devices is becoming more and more serious. serious. When the switching power supply cannot achieve inductance compatibility (Electromagnetic Compatibility, EMC), on the one hand, it will cause the electronic load sensitive to electromagnetic noise to work abnormally, and on the other hand, it will interfere with other electrical equipment by coupling the excessive EMI on the grid side. The current main common noise suppression techniques can b...
Claims
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IPC IPC(8): H05K1/02H05K1/11H05K3/00
CPCH05K1/0268H05K1/111H05K3/00H05K2203/162H05K2203/178
Inventor 廉泽阳黄振伦李艳国
Owner 泰和电路科技(惠州)有限公司