On-chip micro super capacitor and packaging method

Abstract

The invention provides an on-chip micro super capacitor and a packaging method. The on-chip micro super capacitor comprises a silicon wafer unit, a photoresist wall unit, an electrolyte unit and a sealing layer unit; the silicon wafer unit comprises a substrate, a conductive layer and an interdigital electrode; the interdigital electrode is fixedly arranged on the substrate through the conductive layer; the photoresist wall unit is positioned on the upper surface of the substrate and is closed at the periphery of the interdigital electrode; the sealing layer unit is fixedly arranged at an upper opening of the photoresist wall unit, the sealing layer unit and the photoresist wall unit form a closed cavity, and the interdigital electrode is located in the closed cavity; and the sealed cavity is filled with the electrolyte unit. According to the on-chip micro super capacitor and the packaging method provided by the invention, the electrolyte unit is sealed and stored through the closed cavity formed by the photoresist wall unit and the sealing layer unit, so that electrolyte leakage can be effectively avoided, and meanwhile, the on-chip micro super capacitor is ensured not to volatilize so as to ensure long-term work.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to an on-chip micro supercapacitor and a packaging method. Background technique [0002] Micro supercapacitors are a type of electrochemical capacitors that are different from various dielectric capacitors in current integrated circuits, and their capacitance density can be 3 to 4 orders of magnitude higher than that of traditional dielectric capacitors. In recent years, micro-supercapacitors are often used as energy storage or filtering components in microsystems. [0003] Although the on-chip processing and molding scheme of micro-supercapacitors has matured, it is still impossible to perform on-chip wafer-level packaging of micro-supercapacitors without destroying the structure and function. The reasons are: [0004] The existing on-chip wafer-level packaging technology for micro-supercapacitors is prone to electrolyte leakage and volatilization. Contents of the invention ...

AI Technical Summary

Problems solved by technology

[0004] Existing on-chip wafer-level packaging technology for micro-supercapacitors is prone to electrolyte leakage and volatilization

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