A kind of on-chip micro supercapacitor and packaging method

Abstract

The invention provides an on-chip micro supercapacitor and a packaging method, including a silicon wafer unit, a photoresist wall unit, an electrolyte unit and a sealing layer unit; the silicon wafer unit includes a substrate, a conductive layer and an interdigital electrode; the interdigital electrode The conductive layer is fixed on the substrate; the photoresist wall unit is located on the upper surface of the substrate and closed around the interdigital electrodes; the sealing layer unit is fixed at the upper opening of the photoresist wall unit, and is connected with the photoresist The wall unit forms a closed cavity, and the interdigitated electrodes are located in the closed cavity; the electrolyte unit is filled in the closed cavity. The on-chip micro-supercapacitor and packaging method provided by the present invention seal the electrolyte unit through the airtight cavity formed by the photoresist wall unit and the sealing layer unit, which can effectively avoid electrolyte leakage, and at the same time ensure that the on-chip micro-supercapacitor does not volatilize to ensure long-term Work.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to an on-chip micro supercapacitor and a packaging method. Background technique [0002] Micro supercapacitors are a type of electrochemical capacitors that are different from various dielectric capacitors in current integrated circuits, and their capacitance density can be 3 to 4 orders of magnitude higher than that of traditional dielectric capacitors. In recent years, micro-supercapacitors are often used as energy storage or filtering components in microsystems. [0003] Although the on-chip processing and molding scheme of micro-supercapacitors has matured, it is still impossible to perform on-chip wafer-level packaging of micro-supercapacitors without destroying the structure and function. The reasons are: [0004] The existing on-chip wafer-level packaging technology for micro-supercapacitors is prone to electrolyte leakage and volatilization. Contents of the invention ...

AI Technical Summary

Problems solved by technology

[0004] Existing on-chip wafer-level packaging technology for micro-supercapacitors is prone to electrolyte leakage and volatilization

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