Anti-static structure, MOSFET device and manufacturing method thereof
An anti-static and device technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, electrical components, etc., can solve the problem of weak anti-static limit ability, and achieve the improvement of anti-static limit ability, obvious effect, and improved effective channel. Effect
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Embodiment 1
[0030] Embodiment one: with reference to attached Figure 4-5 , an antistatic structure, comprising an oxide layer isolation layer 1, depositing polysilicon on the oxide layer isolation layer to form a polysilicon region 2 of an ESD protection structure, and the polysilicon region 2 includes a first region 21, a second region 22 and a third region A fourth area 24 is provided between the area 23 , between the first area 21 and the third area 23 and between the second area 22 and the third area 23 .
[0031] Specifically, the first region 21, the second region 22, and the third region 23 are all N+ regions, and the fourth region 24 is a P+ region, and the doping type is N-P-N-P-N structure formed from the outside to the inside, wherein The contact surface between the P+ region and the N+ region forms a PN junction, and the polysilicon PN junction is curved, that is, the NPN diode group is formed in a curved structure, and its curved shape is formed by continuous connection of m...
Embodiment 2
[0035] Embodiment 2: A MOSFET device, the antistatic structure described in Embodiment 1 is arranged in the gate area, and can refer to the attached figure 2 The distribution of locations is shown.
Embodiment 3
[0036] Embodiment three: in this example, a kind of manufacturing method of MOSFET device is provided, namely the manufacturing method of a kind of MOSFET device described in embodiment two, comprises the following steps:
[0037] Form grooves on the silicon epitaxial wafer by photolithography and etching, and form a gate oxide layer by thermal oxidation in the grooves (photolithography version 1);
[0038]Deposit gate polysilicon and etch back, fill the gate polysilicon in the trench to form MOSFET gate;
[0039] Deposit an oxide layer, and use photolithography to form an oxide layer isolation layer 1 (photolithography plate 2) for making an electrostatic protection structure;
[0040] performing polysilicon deposition, photolithography and etching on the oxide isolation layer to form the polysilicon region 2 of the ESD protection structure;
[0041] P-type dopant ions are first implanted in the polysilicon region 2, and then N-type dopant ions are selectively implanted usin...
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