FPGA prototype verification device and method

A technology of prototype verification and protocol data packets, which is applied in the field of FPGA prototype verification devices, can solve the problems that FPGA prototype verification devices have not yet been provided, and achieve the effects of accelerating time to market, improving efficiency, and shortening the research and development cycle

Pending Publication Date: 2021-12-07
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in the current related technologies, there is no FPGA prototype verification device that implements the MCTP protocol using the PCIE bus

Method used

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  • FPGA prototype verification device and method
  • FPGA prototype verification device and method
  • FPGA prototype verification device and method

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Embodiment Construction

[0040] The core of the present application is to provide an FPGA prototype verification device and method, so as to effectively verify the implementation of the PCIE bus of the MCTP protocol.

[0041] In order to describe the technical solutions in the embodiments of the present application more clearly and completely, the technical solutions in the embodiments of the present application will be introduced below in conjunction with the drawings in the embodiments of the present application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0042] Aiming at the problem that there is no FPGA prototype verification device using the PCIE bus to implement the MCTP protocol in the current related technologies, this application provides an FPGA prototype verification solution, which can effectively solve the above problems.

[004...

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Abstract

The invention discloses an FPGA prototype verification device and method. The device comprises a PICE interface, a clock module, a memory and an FPGA chip which are arranged on a board card. The method comprises the steps that a to-be-verified RTL code used for achieving an MCTP based on a PCIE bus is compiled to generate an execution file; the execution file is transplanted to the FPGA chip; the FPGA chip creates a CPU, a chip internal interconnection bus, a memory controller and an MCTP processing module by running the execution file, wherein the CPU is connected with the memory and the MCTP processing module through the chip internal interconnection bus; and then MCTP data packet receiving and transmitting verification between the CPU and a test host is carried out through the PCIE interface. According to the invention, a software and hardware verification platform is provided for realizing the MCTP by adopting the PCIE bus, time to market of a product is accelerated, and the research and development cycle of the product is shortened.

Description

technical field [0001] The present application relates to the technical field of electronic design, in particular to an FPGA prototype verification device and method. Background technique [0002] FPGA (Field Programmable Gate Array, Field Programmable Gate Array) prototype verification is a mature technology used in ASIC (Application Specific Integrated Circuit, application specific integrated circuit) design, by integrating the RTL (Register Transfer Level, register Transmission level) codes are transplanted into FPGA to verify the related functions of ASIC, which can verify whether the ASIC implementation model matches the expected design performance. [0003] MCTP (Management Component Transport Protocol, Management Component Transport Protocol) is a communication protocol used for data transmission between internal devices of the computer. Line bus), PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) and other buses for ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36G06F13/40G06F13/42
CPCG06F11/3624G06F11/364G06F13/4022G06F13/4221G06F2213/0026
Inventor 伍峰
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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