Dual modulus prescaler

Abstract

A dual-modulus prescaler has improved performance for high-speed operation. A timing signal is developed from a flip flop circuit two and one-half clock cycles before the last stage of the prescaler is clocked. The timing signal is used to produce a selector signal to gate a multiplexer. Because of the early generation of the timing signal, the multiplexer selection process is removed from the critical path. The remaining delay through the multiplexer is minimal to minimize the critical path of the prescaler.

Description

technical field [0001] The present invention generally relates to frequency dividing or counting circuits. More particularly, the present invention relates to low power, high speed prescalers that can be used in such applications as phase locked loop frequency synthesizers. Background technique [0002] Prescaler circuits for high speed frequency dividers, frequency synthesizers and similar devices are well known in the art. A dual-mode prescaler is a counter whose frequency division ratio or mode can be switched from one value to another by an external control signal. A commonly known implementation of a prescaler uses a counter circuit comprising series coupled flip-flop circuits for obtaining a fractional output signal from a clock signal. Therefore, when the external control signal has a first state, the prescaler can be divided by a first factor, and when the external control signal has a second state, the prescaler can be divided by a second factor. [0003] Current...

AI Technical Summary

Problems solved by technology

Therefore, a prescaler for portable devices must have very low power consumption

In addition, to further reduce power consumption, the supply voltage for electronic circuits in portable devices is being lowered

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