Cavity-containing silicon wafer on multilayer insulator and preparation method thereof
A multi-layer insulator and silicon wafer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as high cost and complicated preparation process, and achieve simple method, simplified production process, and product consistency high effect
Pending Publication Date: 2021-12-24
慧石(上海)测控科技有限公司
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Problems solved by technology
[0005] The purpose of the present invention is to overcome the deficiencies in the prior art, and provide a silicon wafer on a multilayer insulator containing a cavity and a preparation method thereof, thereby solving the problem of high cost and Complicated preparation process and other issues
Method used
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Embodiment 1
[0044] Embodiment 1: as figure 1 As shown, the multilayer silicon-on-insulator wafer containing cavities in this embodiment includes a common wafer 7 , and the wafer 7 includes a first surface 1 and a second surface 6 opposite to each other. The inside of the wafer 7 is provided with a cavity portion; the cavity portion includes a first cavity portion 9 and a second cavity portion 8, and the first cavity portion 9 is the first cavity portion arranged on the wafer 7. A cavity between the first surface 1 and the second surface 6 ; the second cavity portion 8 is a passage connecting the first surface 1 and the first cavity portion 9 .
[0045] The inner wall of the cavity part is provided with a first insulating layer 4, and a first semiconductor layer 2 is provided in the second cavity part 8, and the first semiconductor layer 2 is arranged on the first insulating layer 4. outside and completely fill the channel. A second semiconductor layer 5 is arranged outside the first ins...
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The invention provides a cavity-containing silicon wafer on a multilayer insulator, which comprises a wafer. The wafer comprises a first surface and a second surface which are oppositely arranged, and a cavity part is arranged in the wafer; the cavity part comprises a first cavity part and a second cavity part, and the first cavity part is a cavity arranged between the first surface and the second surface of the wafer; and the second cavity part is a channel communicated with the first surface and the first cavity part. A first insulating layer is arranged on the inner wall of the cavity part, a first semiconductor layer is arranged in the second cavity part, and the channel is completely filled with the first semiconductor layer. And a second insulating layer is arranged between the first cavity part and the first surface. The invention also provides a preparation method of the cavity-containing silicon wafer on a multilayer insulator. According to the cavity-containing silicon wafer on the multilayer insulator and the preparation method thereof, the production cost is effectively reduced, the production efficiency is improved, and the preparation process is simplified.
Description
technical field [0001] The invention belongs to the technical field of semiconductors, in particular to a silicon wafer on a multilayer insulator containing a cavity and a preparation method thereof. Background technique [0002] Silicon on Insulator (Silicon on Insulator, SOI), as an emerging semiconductor material, has advantages that bulk silicon materials cannot match. The use of SOI materials can achieve dielectric isolation of components in integrated circuits, completely eliminating the need for bulk silicon CMOS circuits. The parasitic latch-up effect, and also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and low power consumption. In addition, the structural complexity, product yield and performance improvement of MEMS devices also benefit from the application of SOI materials. [0003] At present, in the prior art, the following methods are mostly used to prepare silicon-on-ins...
Claims
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Login to View More IPC IPC(8): H01L21/762
CPCH01L21/7624
Inventor 周志健余伦宙
Owner 慧石(上海)测控科技有限公司