Manufacturing method of fin field effect transistor

Abstract

The invention discloses a manufacturing method of a fin type field effect transistor. The manufacturing method comprises the following steps: 1, etching a semiconductor substrate to form fin bodies; 2, depositing an FCVD oxide layer to completely fill a spacer region between the fin bodies; 3, carrying out first annealing to enable the FCVD oxide layer to be cured for the first time; and 4, performing back etching on the FCVD oxide layer so as to expose the top portion of the fin body. 5, depositing a sacrificial dielectric layer to partially surround the top portion of the fin body; 6, carrying out second annealing to completely cure the FCVD oxide layer, wherein the oxygen of the FCVD oxide layer in the second annealing consumes the material of the fin body, so that the width of the bottom portion of the fin body is reduced, and the punch-through prevention capability of the fin field effect transistor is improved; and 7, removing the sacrificial dielectric layer. According to the invention, the anti-punch-through capability of the device can be improved, the mobility of channel carriers is improved, and the performance of the device is improved.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a method for manufacturing a Fin Field Effect Transistor (FinField Effect Transistor, FinFET). Background technique [0002] With the development of semiconductor process technology, the gate width continues to shrink, and traditional planar CMOS devices can no longer meet the needs of devices, such as the control of short channel effects. For technology nodes below 20nm, the FinFET structure has better electrical performance. Such as figure 1 Shown is the plan view of the first existing fin field effect transistor; figure 2 is along figure 1 The sectional view of the middle dashed line AA; image 3 is along figure 1 The cross-sectional view of the dotted line BB; the existing first fin field effect transistor includes: [0003] The fin body 2 is formed on a semiconductor substrate such as a silicon substrate 1, and the bottom of the fin body ...

AI Technical Summary

Problems solved by technology

[0011] First, ion implantation will cause ion implantation damage, which will reduce the carrier mobility of the channel region, thereby reducing device performance

[0012] Secondly, the doping profile of the anti-penetration layer 304 formed by ion implantation is shown by the mark 304a. It can be seen that the doping of the anti-penetration layer 304 will gradually decrease from the peak position upward and downward. , the tail (tail) formed during the upward lowering process will enter into the top region of the fin body 302, and since the channel region will be formed in the top region of the fin body 302, the anti-penetration The tail doping of layer 304 will affect the doping of the channel region, and finally the performance of the channel region such as threshold voltage and carrier mobility will be formed, thereby reducing the device performance

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