Multi-chip packaging structure

Abstract

The invention relates to a multi-chip packaging structure. External pins are respectively arranged on at least one side edge of a die bonding area of a packaging carrier plate, can be electrically connected to an external preset electronic circuit and electrically and fixedly connect the die bonding area to a first chip, and the first chip is respectively provided with an internal circuit and an isolation sealing ring structure. A plurality of input and output units and a plurality of first welding pads are sequentially and electrically connected to at least one side edge outside the internal circuit from inside to outside, and each first welding pad is electrically connected to a corresponding external pin through a first wire. A plurality of dummy welding pads are arranged between the plurality of input and output units on at least one side and the plurality of adjacent first welding pads, a second chip is fixedly stacked on the internal circuit of the first chip, and at least one group of second welding pads are arranged on the surface of the second chip; in this way, the second wires can be electrically connected to the corresponding external pins through the dummy welding pads, the wires are welded without overlapping or contact to cause short circuit, and manufacturing is facilitated.

Description

technical field [0001] The present invention provides a multi-chip packaging structure, especially for the design of chips used in driving computers. At least one row of dummy pads is provided for the first chip on the packaging carrier board, which can be used for at least one set of second pads of the second chip. The second wire is electrically connected to the external pins through the dummy pads, so that the wires do not overlap, contact and short circuit, and then the chip design is formed by quad no-lead (QFN) packaging. Background technique [0002] Press, most of the automotive chips used in driving computers use QFN packaged quadrilateral leadless automotive chips, and this type of automotive chip is designed to stack two chips (please also refer to image 3 , Figure 4 , Figure 5 , Figure 6 As shown), the bonding wire A1 (Bonding Wire) of the upper chip A must pay attention to the angle, and the bonding wires A1 of different signals cannot be staggered, and th...

AI Technical Summary

Problems solved by technology

[0002] Press, most of the automotive chips used in driving computers use QFN packaged quadrilateral leadless automotive chips, and this type of automotive chip is designed to stack two chips (please also refer to image 3 , Figure 4 , Figure 5 , Image 6 As shown), the bonding wire A1 (Bonding Wire) of the upper chip A must pay attention to the angle, and the bonding wires A1 of different signals cannot be staggered, and the bonding wires A1 and B1 of the upper chip A and the lower chip B must form a height Poor, can not produce overlapping contact, otherwise there will be a short circuit, but due to packaging pressure, colloidal mold flow and other factors during the packaging process, it is quite easy to cause the adjacent soldering leads A1, B1 to sink, bend or shift, etc. And form welding leads A1, B1 overlap, the short circuit phenomenon of contact (as, Fig. 5, Image 6 As shown in the upper left corner and the lower right corner of the circle), it causes the problem that the automotive chip package fails and cannot be used, and also causes the defect rate of the product to increase. In order to maintain the height difference between the two chips A and B welding leads A1 and B1 , resulting in a higher height of the automotive chip after packaging

[0003] Furthermore, usually the upper and lower chips A and B used in automotive chips are manufactured by different manufacturers, because the chips A and B manufactured by different manufacturers have different design configurations such as circuits, first pad pins, etc., adjacent to each other. There are also differences in the spacing W1 and W2, and the pad B2 of the lower chip B must cooperate with the pad A2 of the upper chip A to carry out the layout, configuration and adjustment of the pad pin position of the preset circuit. However, if you want to replace the upper In the case of chip A, the circuit layout, configuration and pad pin positions of the lower chip B must be redesigned and adjusted, and the automotive chip after packaging must be re-tested, which is time-consuming and labor-intensive, and extremely uneconomical. How to solve the problems and troubles of the current automotive chip soldering leads, which are easily overlapped and contacted during packaging, resulting in short circuits and failures, and when replacing the stacked chips used, the circuit layout, soldering leads, etc. must be redesigned, The troubles and deficiencies of adjustment are the directions for the relevant manufacturers engaged in this industry to study and improve.

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