FFT code bit inverse sequence algorithm vectorization implementation method and device based on shuffling operation

An implementation method and vector technology, which is applied in the field of signal processing, can solve the problems of occupying processor memory space, calculation speed depends on calculation efficiency, and hardware circuit structure realizes single function, so as to speed up, save time and space, and save hardware resources Effect

Active Publication Date: 2022-03-01
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

Problems in the existing technology currently implemented: (1) The computing speed of the software algorithm depends on the calculation efficiency of the reverse sequence number and the time it takes to access the data. Take up processor memory space
(2) The hardwar

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  • FFT code bit inverse sequence algorithm vectorization implementation method and device based on shuffling operation
  • FFT code bit inverse sequence algorithm vectorization implementation method and device based on shuffling operation
  • FFT code bit inverse sequence algorithm vectorization implementation method and device based on shuffling operation

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Embodiment Construction

[0068] The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0069] Such as Figure 4 As shown, in this embodiment, the vectorization implementation method of the FFT code bit reverse order algorithm based on the shuffling operation includes:

[0070] 1) The data that needs to be processed in "code bit reverse order" is loaded into x registers respectively in the p vector processing units VPE of the vector processing unit VPU to form vector data;

[0071] 2) Configure the shuffling mode memory, and write the i-th shuffling rule D containing p-digit values ​​into the i-th address of the shuffling mode memory i , the i-th shuffling rule D i Each digit in indicates the location of the data source of the current location;

[0072] 3) traverse and select a shuffling rule as the current shuffling mode;

[0073] 4) Based on ...

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Abstract

The invention discloses an FFT (Fast Fourier Transform) code bit inverse sequence algorithm vectorization implementation method and device based on shuffling operation. The method comprises the following steps of: loading data which needs to be subjected to code bit inverse sequence processing into respective q registers in p vector processing units VPE of a vector processing part VPU to form vector data; configuring a shuffling mode memory, and generating a plurality of shuffling rules to indicate the position of the data source of the current position; traversing and selecting each current shuffling mode; based on shuffling rules corresponding to the current shuffling modes, shuffling vector data in respective q registers in p vector processing units (VPEs) loaded to a vector processing unit (VPU) until all the shuffling rules are traversed; and finally outputting vector data obtained by shuffling operation. The method is simple to implement, high in implementation efficiency, low in power consumption and good in effect, and can give full play to the calculation performance of the vector processing component to implement simple and efficient FFT'code bit reverse sequence 'calculation.

Description

technical field [0001] The invention relates to the field of signal processing, in particular to a method and device for realizing vectorization of an FFT code bit reverse sequence algorithm based on a shuffling operation. Background technique [0002] Fourier transform is one of the most basic methods in time-frequency domain transform analysis, and discrete Fourier transform (DFT: Discrete Fourier Transform) is the basis of many digital signal processing methods. FFT is an efficient algorithm of DFT, called fast Fourier transform (fast Fourier transform). [0003] FFT can basically be divided into two categories: time extraction method and frequency extraction method, the most common is the base 2 time extraction and frequency extraction algorithm proposed by Coolly-Tukey. The so-called selection is the process of dividing the long sequence into short sequences and realizing the DFT of the long sequence through the DFT of the short sequence. The method of time extraction...

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Application Information

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IPC IPC(8): G06F9/315G06F9/30G06F15/80G06F17/14
CPCG06F9/30032G06F9/30036G06F9/3012G06F15/8076G06F17/142
Inventor 王耀华扈啸郭阳刘胜文梅陈照云时洋
Owner NAT UNIV OF DEFENSE TECH
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