Semiconductor process chamber and lower electrode potential control method

Abstract

The invention provides a semiconductor process chamber which comprises a cavity, an upper electrode assembly, a base and a lower electrode assembly, the base is arranged in the cavity and used for bearing a wafer, the upper electrode assembly is used for providing a radio frequency signal for process gas in the cavity so as to excite the process gas in the cavity to form plasma, the base is internally provided with a lower electrode, and the lower electrode assembly is arranged in the cavity. The lower electrode assembly is connected between the lower electrode and the grounding end and used for adjusting the impedance of the lower electrode assembly connected between the lower electrode and the grounding end so as to keep the potential of the lower electrode at the preset potential. In the invention, the lower electrode assembly can adjust the radio frequency voltage division ratio between the upper impedance and the lower impedance of the lower electrode by adjusting the impedance connected between the lower electrode and the grounding end, so that the potential of the lower electrode is kept at the required preset potential under the condition that new radio frequency power is not introduced; and the plasma damage of the radio frequency power to the wafer and the influence of the radio frequency power on the plasma distribution above the wafer are reduced. The invention further provides a lower electrode potential control method.

Description

technical field [0001] The present invention relates to the field of semiconductor process equipment, in particular to a semiconductor process chamber and a lower electrode potential control method realized by the semiconductor process equipment. Background technique [0002] In the field of semiconductor technology, as the geometric size of electronic devices continues to decrease and the density of devices continues to increase, the feature size in semiconductor technology is getting lower and lower (such as 7nm, 5nm and lower technology bands), and the depth of film patterning The width ratio is getting bigger and bigger (such as 10:1, 20:1 or higher), and the common coating method can no longer meet the needs of the new generation of products. Atomic layer deposition (Atomic layer deposition, ALD) process has become a new thin film deposition method widely used at present. [0003] The self-limiting surface reaction mechanism of atomic layer deposition technology determ...

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Problems solved by technology

[0008] However, when using the existing plasma-enhanced atomic layer deposition process chamber for the atomic layer deposition process, the problem of uneven film thickness on the wafer surface often occurs, which affects the product yield

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