Semiconductor structure and forming method of semiconductor structure

Abstract

The embodiment of the invention provides a semiconductor structure and a forming method of the semiconductor structure, and the semiconductor structure comprises a substrate which comprises an array region and a peripheral region, the peripheral region is internally provided with a first isolation structure, the array region is internally provided with a second isolation structure, and the area of a top opening of the first isolation structure is larger than that of a top opening of the second isolation structure; the first isolation structure is provided with a first groove and a first insulation structure used for filling the first groove; the first insulation structure at least comprises a top isolation layer, the top surface of the top isolation layer is flush with the top surface of the substrate, and the top isolation layer at least comprises a low-dielectric-constant material. According to the embodiment of the invention, the first groove in the first isolation structure is filled with the first insulation structure in the peripheral region, so that the defects of edge electric leakage and the like of the shallow trench isolation structure in the peripheral region are prevented, the yield of a formed final device is improved, and the performance loss of the shallow trench isolation structure is prevented.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor structure and a method for forming the semiconductor structure. Background technique [0002] In the manufacturing process of semiconductor devices, an isolation structure is usually used to isolate a plurality of materials disposed on the substrate, and the isolation structure is usually a shallow trench isolation structure (Shallow Trench Isolation, STI). [0003] The trench occupation area of ​​the shallow trench isolation structure is small, which can better adapt to semiconductor devices with smaller critical dimensions, and the performance of the shallow trench isolation structure is crucial to the performance and yield of the final formed semiconductor device. [0004] However, when the critical dimensions of semiconductor devices shrink to the 28nm node and below, the shallow trench isolation structure profile becomes more and more difficult to control. For ...

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Problems solved by technology

[0004] However, as the critical dimensions of semiconductor devices shrink to the 28nm node and below, the shallow trench isolation structure profile becomes more and more difficult to control

For example, when the buried word line structure is subsequently formed, traditional dry cleaning and wet cleaning will damage the shallow trench isolation structure, which may cause the height of the shallow trench isolation structure to be lower than the substrate, resulting in Defects such as edge leakage reduce the reliability of semiconductor devices, which in turn leads to the loss of yield and performance of final devices

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