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Semiconductor structure and forming method thereof

A semiconductor and conductive type technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve the problems of poor gate structure control of the channel and difficulty in the channel, so as to reduce the source and drain Possibility of pole punch-through, effect of improving electrical performance

Pending Publication Date: 2022-04-12
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0016] It can be seen from the background art that the semiconductor structures formed so far still have the problem of poor performance. The reason for the poor performance of the semiconductor structure is analyzed in combination with a method for forming the semiconductor structure.

[0017] refer to Figure 1 to Figure 5 , shows a structural schematic diagram corresponding to each step in a method for forming a semiconductor structure.

[0018] Such as figure 1 As shown, a base is provided, the base includes an NMOS region I and a PMOS region II, the base includes a substrate 10 and a fin 11 on the substrate 10, the fin 11 includes an anti-puncture layer 12 and is located The first channel layer 13 on the anti-penetration layer 12 .

[0019] refer to figure 2 , in the fins 11 (such as figure 1 As shown), an isolation material layer 14 is formed on the exposed substrate 10 .

[0020] refer to image 3 After the isolation material layer 14 is formed, the fins 11 in ...

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Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which comprises a first region and a second region, the substrate comprises a substrate and a plurality of fin parts located on the substrate, each fin part comprises a first anti-punch-through layer, a second anti-punch-through layer located on the first anti-punch-through layer, and a first channel layer located on the second anti-punch-through layer, the first anti-punch-through layer is doped with first type ions, and the second anti-punch-through layer is doped with second type ions; forming an isolation material layer on the substrate exposed out of the fin part; removing the second anti-punch-through layer and the first channel layer in the first region to form a groove; and forming a second channel layer in the groove. When the semiconductor structure works, the first anti-punch-through layer reduces the punch-through probability of the source electrode and the drain electrode of the first region, the second anti-punch-through layer reduces the punch-through probability of the source electrode and the drain electrode of the second region, and the electrical performance of the semiconductor structure is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of ultra-large-scale integrated circuits, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length has been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The channel becomes more and more difficult, making subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE:...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L27/092H01L29/06
Inventor 赵海
Owner SEMICON MFG INT (SHANGHAI) CORP
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