Lead frame structure and method for improving layering of pins of semiconductor device
A lead frame and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid device manufacturing, semiconductor/solid device components, etc., can solve unsatisfactory problems, reduce delamination, improve product reliability, and increase adhesion Effect
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Embodiment 1
[0020] see figure 1 , the pin size of the lead frame in the figure is relatively large, and there is a small hole on both sides of the pin, that is, the locking hole 4 . The size of the small hole can be determined according to the size of the pin under the condition of ensuring that the continuous flow bonding required by the product and the strength around the small hole of the lead frame pin are met.
Embodiment 2
[0022] see figure 2 , the pin size of the lead frame in the figure is small, and it also includes a mounting hole 6, and a locking hole 4 can be made at the lead connection under the pin to achieve the purpose of improving the layering of the pin.
[0023] figure 1 and figure 2 Among them, different lead frames have different hole sizes, but all of them can achieve the purpose of improving pin layering.
[0024] The small holes provided on the lead frame of the present invention can increase the bonding force between the pins of the lead frame and the plastic encapsulation compound, release the stress in the wiring area of the pins, and further reduce the delamination of the pins of the lead frame.
[0025] The layering of lead frame pins is reduced, the product yield rate is improved, and the product reliability is improved.
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