Formation method of semiconductor structure

Abstract

A method for forming a semiconductor structure comprises the following steps: forming a first gate across a first fin part and a second gate across a second fin part; etching the first fin parts on the two sides of the first grid to form first grooves, etching the second fin parts on the two sides of the second grid to form second grooves, and enabling the width of the first grooves to be smaller than that of the second grooves; a sacrificial layer covering the side wall of the first grid electrode, the side wall of the first groove, the side wall of the second grid electrode and the side wall of the second groove is formed, the sacrificial layer further covers the liner oxide layer on the substrate in the first area, and the sacrificial layer exposes the liner oxide layer on the side wall of the second fin part at the bottom of the second groove; etching the liner oxide layer exposed by the sacrificial layer, and exposing the side wall of the second fin part at the bottom of the second groove; removing the sacrificial layer; and in the same process step, a first source-drain doping layer is formed in the first groove by adopting an epitaxial growth process, and a second source-drain doping layer is formed in the second groove. According to the forming method, the growth volume of the second source-drain doping layer can be increased, and the technological process is simplified.

Description

Technical field [0001] The present invention relates to the field of semiconductor manufacturing technology, in particular to a semiconductor structure formation method. Background [0002] In semiconductor manufacturing, as the feature size of integrated circuits continues to decrease, the channel length of MOSFETs also decreases accordingly. However, as the length of the device channel shortens, the distance between the device source and the drain also shortens, resulting in poor control of the gate to the channel, and short-channel effects (SCE: short-channel effects) are more likely to occur. [0003] FinFET has outstanding performance in inhibiting short channel effects, fin FEET gates can at least control the fins from both sides, so compared with planar MOSFETs, FinFET gates have stronger control of the channel and can inhibit short channel effects well. [0004] However, the performance of semiconductor structures in existing technologies still needs to be improved. Cont...

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Problems solved by technology

[0004] However, the performance of semiconductor structures in the prior art still needs to be improved

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