Hybrid transmitting terminal driver and application method thereof
A driver and transmitter technology, applied in the field of hybrid transmitter drivers, to achieve the effects of improving competitiveness, large common mode range, and low power consumption
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[0064] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the drawings show the invention
[0067] Below, embodiments of the present invention provide a schematic diagram of a circuit connection structure of a high-speed and low-power hybrid driver, such as
[0069] The circuit connection structure of the mode selection module 1 includes: the input power supply voltages VDD1 and VDD2 of the driver, two
[0071] Further, as shown in the enlarged view on the left side of FIG. 3, the branch wiring of VDD1 is connected to the source terminal of the first PMOS transistor and the first
[0077] As shown in Figure 3, for configuring the low-voltage source module 3, its circuit connection structure includes: an off-chip input positive power supply of the driver
[0078] It should be noted that VDD2 is a positive voltage, and VEE is a negative voltage, which is equivalent to a positive power supply and ...
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Abstract
Description
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Application Information
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