Manufacturing method of array substrate, display panel and display device

Abstract

The invention discloses a manufacturing method of an array substrate, a display panel and a display device.The manufacturing method of the array substrate comprises the steps that a substrate is provided; sequentially depositing a first metal layer and a protective layer on the substrate; a mask is used for exposing and developing the protective layer, a through via hole is formed, the via hole is arranged in the mode that the upper portion is wide and the lower portion is narrow in the axis direction of the via hole, and the etching duration during developing ranges from 85 s to 95 s; and depositing a transparent conductive layer on the protective layer, wherein the transparent conductive layer is electrically connected with the first metal layer through the via hole. According to the technical scheme, the fracture risk of the via hole of the protection layer can be reduced, the aperture and gradient size of the via hole are ensured, and the product yield is improved.

Description

technical field [0001] The present application relates to the field of display technology, and in particular, to a manufacturing method of an array substrate, a display panel and a display device. Background technique [0002] With the continuous development of display technology, the improvement of product yield has also received more attention. One of the ways to reduce the yield is to improve the opening defect of the protective layer (PV hole defect, Passivation hole defect). The general PV hole defect is mainly the fracture under the protective layer (PV undercut, Passivation undercut), which refers to the formation of PV holes. When the protective layer is broken, the subsequent indium tin oxide (ITO) film formation occurs abnormally, which eventually leads to ITO explosion. [0003] The reason for the rupture of the protective layer is that the development and etching are performed after the protective layer is coated and exposed, and the etching time cannot be too l...

AI Technical Summary

Problems solved by technology

One of the ways to reduce the yield is to improve the opening defect of the protective layer (PV hole defect, Passivation hole defect). The general PV hole defect is mainly a fracture under the protective layer (PV undercut, Passivation undercut), which refers to the formation of PV holes. The rupture of the protective layer will cause abnormalities in the film formation of the subsequent indium tin oxide liner (ITO), which will eventually lead to ITO damage

[0003] The reason for the breakage of the protective layer is that after the protective layer is coated and exposed, it is developed and etched. The etching time should not be too long (other problems will occur when etching for a long time), so that the protective layer will remain in the hole and cover a part of the PV hole, resulting in PV. The hole becomes smaller, or the protective layer will form an irregular layer inside the PV hole, affecting the pore size of the PV hole

After the ITO coating is completed, the power is turned on. Since the PV hole diameter becomes smaller, the contact area between the corresponding ITO and the metal layer becomes smaller, and the resistance value may be too large, which may cause a risk of explosion.

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