Preparation method for forming Split Gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) in one step

Abstract

The invention discloses a preparation method for forming a Split Gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) in one step, and relates to the technical field of semiconductor power devices. The method and the device are used for solving the problem that the preparation cost is increased due to the fact that preparation steps are increased in order to avoid gate poly residues on a linker oxide of a peripheral terminal trench in the preparation of an existing MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device. Comprising the following steps: sequentially forming a liner Oxide layer and a source poly layer in a first groove and a second groove; second photoresist layers are formed on the two sides of the top of the second groove, the top of the first groove and the two sides of the top of the first groove, and the source poly layer and the liner oxide layer in the second groove are etched through an etching method; the second photoresist layer is removed, and the liner oxide layer is etched through an etching method; and forming a gate oxide layer and a gate poly layer in the second groove, on the two sides of the top of the second groove, on the top of the first groove and on the two sides of the top of the first groove.

Description

technical field [0001] The invention relates to the technical field of semiconductor power devices, and more particularly to a method for preparing a one-step Split Gate MOSFET device. Background technique [0002] The one-step forming process of the SGT (Split-Gate-Trench) structure The traditional manufacturing method is to etch the poly in the cell area through the photoresist of the source poly mask, and then remove the photoresist to linerOxide the cell area. Wet etching, such a process has the following disadvantages, such as Figure 1A As shown in the figure, a hole is left in the linerOxide layer 107 in the peripheral terminal area, and there is a risk of poly residue after the gate poly layer 111 is filled and etched back, so that the source (S) and gate (G) are short-circuited to cause leakage; such as Figure 1B As shown in the figure, the IPO morphology of the cell is uneven and the thickness is not easy to control (gate poly layer 111 and source poly layer 108),...

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Problems solved by technology

[0005] The embodiment of the present invention provides a one-step Split Gate MOSFET device preparation method, which is used to solve the existing MOSFET device preparation in order to avoid the gate poly residue on the liner oxide of the peripheral terminal trench, there is an increase in the preparation steps leading to an increase in the preparation cost question

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