Dynamic configurable high-performance queue scheduling method, system, processor and protocol

Abstract

The invention belongs to the technical field of multi-queue scheduling of network equipment, and discloses a dynamic configurable high-performance queue scheduling method, system, processor and protocol, and the method comprises the following steps: storing queue state information by using BRAM (Block Random Access Memory) or URAM (Universal Random Access Memory) resources of an FPGA (Field Programmable Gate Array); an external user is supported to dynamically configure queue state information through an AXI lite interface and randomly disable or start a specified queue so as to perform accurate transmission control on multiple queues; the default scheduling method is high-performance polling scheduling, and any scheduling algorithm can be expanded or replaced. The scheduling algorithm adopts a pipeline structure to support two different operations, namely generating a dequeue request and receiving a dequeue completion state. One fifo is used for storing a scheduled queue and executing polling scheduling, distributing a unique Tag number for each dequeue request, and maintaining a linked list for storing the Tag number for each queue so as to maintain and follow up a plurality of dequeue states of parallel processing; and the flexibility and the expandability are greatly improved.

Description

technical field [0001] The invention belongs to the technical field of multi-queue scheduling of network equipment, and in particular relates to a method, system, processor and protocol for dynamically configurable high-performance queue scheduling. Background technique [0002] At present, with the increase of new functions and new scenarios of the Internet and the Internet of Things, it is necessary to continuously introduce network devices with higher performance and high flexibility, which makes the functions of network interfaces develop rapidly. Network devices such as network cards and servers all require Implement a high-performance and scalable queue scheduling strategy to meet design bandwidth requirements. [0003] At present, the multi-queue scheduling circuit of ASIC-based network equipment is dedicated, that is, it is only tailored for specific applications. For users, it is a "black box" that cannot be changed. Once the scheduling strategy is determined, the u...

AI Technical Summary

Problems solved by technology

[0007] (1) The existing network device scheduling algorithm supports a very limited number of scheduling queues while ensuring high performance and less resources

[0008] (2) The existing network device scheduling algorithm cannot provide a user configuration interface to precisely control the specified queues while ensuring high performance and tens of thousands of queues

[0009] (3) Existing network equipment scheduling algorithms are poor in scalability and universality

[0010] (4) The flexibility of the existing network equipment scheduling algorithm is very poor, and its application scenarios are very limited. The scheduling algorithm is only developed for specific equipment and application scenarios, which brings great inconvenience to the development of new functions and new protocols

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