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In-memory computing circuit based on local multiplication-global addition structure, memory and equipment

A computing circuit and memory technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as excessive current pooling, reduce circuit power consumption, improve calculation parallelism, and reduce circuit area overhead.

Pending Publication Date: 2022-08-05
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In order to solve the above-mentioned problems in the prior art, the present disclosure provides an in-memory computing circuit, memory and electronic equipment based on a local multiplication-integral addition structure, aiming to solve the problem of excessive convergence current of traditional 1T1R circuits and improve high circuit integration Degree and technical issues such as reducing circuit power consumption

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  • In-memory computing circuit based on local multiplication-global addition structure, memory and equipment
  • In-memory computing circuit based on local multiplication-global addition structure, memory and equipment
  • In-memory computing circuit based on local multiplication-global addition structure, memory and equipment

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Embodiment Construction

[0029] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. In the following detailed description, for convenience of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the present disclosure. It will be apparent, however, that one or more embodiments may be practiced without these specific details. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0030] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. The terms "comprising", "comprising" and the like used herein indicate the presence of s...

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Abstract

The invention provides an in-memory computing circuit based on a local multiplication-global addition structure. The in-memory computing circuit comprises a plurality of sub-computing arrays, a plurality of word lines, a plurality of bit lines, a plurality of complementary bit lines and a plurality of source lines, the sub-calculation arrays in each row are connected with a common word line, and the sub-calculation arrays in each column are connected with a common bit line, a common complementary bit line and a common source line; the calculation unit in each sub calculation array comprises a first transistor, a first memory, a second transistor and a second memory; the grid of the transistor is connected with the word line, and the source is connected with the source line; the drain of the first transistor is connected with a first memory, and the other end of the first memory is connected with a bit line; the drain of the second transistor is connected with the second memory, and the other end of the second memory is connected with the complementary bit line; the grid electrode of the third transistor is connected with the source line, the source electrode is grounded, and the drain electrode is connected with the source electrode of the fourth transistor; the grid of the fourth transistor is connected with the input line, and the drain is connected with the calculation line through the switch. The invention also provides a memory and electronic equipment.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductor integrated circuits, and in particular, to an in-memory computing circuit, a memory and an electronic device based on a local multiply-global add structure. Background technique [0002] By effectively reducing the power consumption and delay caused by frequent memory accesses, the in-memory computing technology based on new non-volatile memory is expected to greatly improve computing energy efficiency and computing power, thus providing data-centric computing tasks represented by artificial intelligence. Provide hardware support. Among them, Resistive Random Access Memory (RRAM) shows great potential in terms of operation power consumption, integration density and process compatibility. As a new type of non-volatile memory, resistive memory has the advantages of low power consumption, small delay, high density and high process compatibility. It can greatly reduce the power consum...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/12G11C7/16G11C7/18G11C7/10G11C5/14
CPCG11C7/12G11C7/16G11C7/18G11C7/1069G11C5/147Y02D10/00
Inventor 王琳方窦春萌叶望安俊杰李伟增高行行刘琦李泠刘明
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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