Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Service signal generating circuit

A technology of signal generation circuit and trigger circuit, which is applied in the direction of circuits, electrical components, information storage, etc., can solve the problems of inverter 104 voltage rise, inability to achieve low power consumption, and capacity increase, etc., to eliminate voltage fluctuations stable effect

Inactive Publication Date: 2004-05-12
MITSUBISHI ELECTRIC CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] However, in the above-mentioned conventional inspection signal generating circuit, since the capacity of the capacitor 101 increases due to the cutting of the fuse 103, the voltage on the input side of the inverter 104 will be incomplete depending on the manufacture of the inspection signal generating circuit. There is a problem that the switching state of the fuse 103 cannot be detected reliably
[0013] In addition, if the fuse 103 is not completely cut off, a small current flows through the fuse 103, and there is also a problem that low power consumption cannot be achieved.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Service signal generating circuit
  • Service signal generating circuit
  • Service signal generating circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] Fig. 1 is a circuit diagram showing the construction of a inspection signal generating circuit as Embodiment 1 of the present invention. In FIG. 1, a source of a p-channel transistor 1 is connected to a power supply Vcc, and a reset signal "RESET" is input to a gate from a terminal P1. The source of the n-channel transistor 2 is connected to the grounded fuse 3, the drain is connected to the drain of the p-channel transistor 1, and a reset signal "RESET" is input to the gate from the terminal P1.

[0034] The input side of the inverter 6 is connected to the node N1 which is the connection point of the p-channel transistor 1 and the n-channel transistor 2, and the output of the inverter 6 outputs the inspection signal "OUT" via the terminal P2. The source of p-channel transistor 5 is connected to power supply Vcc, the drain is connected to node N1 , and the gate is connected to the output side of inverter 6 . The drive capability of the p-channel transistor 5 is lower tha...

Embodiment 2

[0048] Next, Embodiment 2 of the present invention will be described. In this second embodiment, a capacitor is provided for stabilizing the voltage level of the node N1 of the inspection signal generating circuit 10 shown in FIG. 1 for a constant period.

[0049] figure 2 It is a circuit diagram showing the structure of the inspection signal generating circuit as the second embodiment of the present invention. figure 2 (a) shows the structure of the inspection signal generating circuit in a state where the fuse 3 is not cut, figure 2 (b) shows the configuration of the inspection signal generating circuit in a state where the fuse 3 is cut. figure 2 The inspection signal generating circuit 20 shown in FIG. 1 adopts a structure in which a capacitor 21 is further connected between a node N2 corresponding to the node N1 of the inspection signal generating circuit 10 shown in FIG. 1 and a power supply Vcc. By providing this capacitor 21, the potential change of the node N2 can ...

Embodiment 3

[0060] Next, Embodiment 3 of the present invention will be described. In this Embodiment 3, after the inspection signal supplied by the inspection signal generating circuit is determined, a reset signal indicating reset release is supplied to other circuits on the semiconductor integrated circuit mounted with the inspection signal generating circuit, so that the The timing-critical operation is caused by the competition between the inspection operation of the inspection signal and the reset release operation of other circuits on the semiconductor integrated circuit.

[0061] image 3 It is a circuit diagram showing the structure of the inspection signal generating circuit as the third embodiment of the present invention. image 3 The maintenance signal generation circuit 30 shown in the figure 2 The structure of the reset signal generating circuit 31 is added to the inspection signal generating circuit 20 shown in .

[0062] The reset signal generating circuit 31 has two fl...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

To reliably relieve a circuit having a defective part by outputting a repair signal in which it is detected correctly whether a fuse is cut off. This circuit is provided with a first p-channel transistor in which the source is connected to a power source and a reset signal is inputted to the gate, an n-channel transistor in which the source is connected to another terminal of a grounded fuse, the drain is connected to a drain of the first p-channel transistor, and the reset signal is inputted to the gate, a first p-channel transistor in which the drain is connected to the node N1 being a connection point of the first p-channel transistor and the n-channel transistors, the source is connected to a power source and which has large on-resistance than that of the n-channel transistor, and an inverter.

Description

technical field [0001] The present invention relates to a repair signal generating circuit mounted on a semiconductor integrated circuit for generating a repair signal indicating that a malfunction generated during the manufacturing process of the semiconductor integrated circuit is replaced with a redundant circuit. Background technique [0002] With the development of semiconductor process technology in recent years, microfabrication technology has been continuously improved, and the integration degree of semiconductor integrated circuits has increased rapidly, thereby increasing the circuit scale. In addition, recently, in order to obtain effects such as increased memory bandwidth and low power consumption, logic circuits and large-scale memory devices are mixedly mounted on the same semiconductor chip. [0003] If a large-scale system circuit is mounted on the same semiconductor chip, it is possible to reduce the area of ​​the system substrate when semiconductor devices ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/04G11C29/00G11C29/04H01L21/82H01L21/822
CPCG11C17/18G11C29/785H01L2924/0002H01L2924/00G11C29/00
Inventor 后藤宏二
Owner MITSUBISHI ELECTRIC CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products