A read-only memory and read-only memory devices

Abstract

A read-only memory is made electrically addressable over a passive conductor matrix, wherein at least a portion of the volume between intersection of two conductors (2;4) in the matrix defines a memory cell (5) in the read-only memory. Data are stored as impedance values in the memory cells. The memory cells (5) comprise either an isolating material (6) which provides high impedance or one or more inorganic or organic semiconductors (9), preferably with an anisotropic conducting property. The semiconductor material (9) forms a diode junction at the interface to a metallic conductor (2;4) in the matrix. By suitable arrangement of respectively the isolating material (6) and semiconductor material (9) in the memory cells these may be given a determined impedance value which may be read electrically and corresponds to logical values in a binary or multi-valued code. The read-only memory device may be realized either as planar or also volumetrically by stacking several read-only memories (ROM) above each other and connecting them with the substrate (1) via addressing buses (14). Such read-only memory devices may be implemented on memory cards with standard card interfaces and used for storage of source information.

Description

technical field Background technique [0001] The prior art provides numerous examples of electrically addressable semiconductor read-only memories in passive matrices. U.S. Patent 4,099,260 (Lynes et al.) discloses a semiconductor read-only memory (ROM) manufactured as a large-scale integrated device, wherein self-isolated bit line surface regions of one conductivity type are formed in the semiconductor substrate directly in the opposite conductivity In the body area of ​​the type. A channel stop region of the same conductivity type as the body region is formed in the space between the bit line regions. A metallized wordline on and perpendicular to the bitline region is formed spaced from the bitline by an isolation layer. The memory cell includes a single Schottky diode. Such diodes will or will not be formed at every intersection of wordlines and bitlines, depending on whether or not openings are formed in the isolation layer during fabrication so that the wordlines make...

AI Technical Summary

Problems solved by technology

[0004] Even though the above-mentioned prior art devices achieve electrical addressing in a passive matrix in a known manner by providing a diode junction in the closed electrode contact, it is somewhat of a relatively high complexity due to the use of different types of semiconductors

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