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Method for encapsulation in chip level by use of electroplating mask of elastic body

A technology of chip-level packaging and elastomers, which is applied to circuits, electrical components, and electrical solid devices, and can solve problems such as the complexity of the manufacturing process and the waste of photoresist materials

Inactive Publication Date: 2005-07-06
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The technical problem to be solved by the present invention is to provide a method that can improve the waste of photoresist material and the complexity of the manufacturing process, so as to reduce the cost of the manufacturing process

Method used

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  • Method for encapsulation in chip level by use of electroplating mask of elastic body
  • Method for encapsulation in chip level by use of electroplating mask of elastic body
  • Method for encapsulation in chip level by use of electroplating mask of elastic body

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Embodiment Construction

[0018] In order to simplify the packaging manufacturing process, avoid waste of photoresist material, and make the chip assembled on the circuit board, it can still be disassembled and redone, so the electroplating manufacturing process is combined with the packaging manufacturing process. The following will match Figure 2A to Figure 2E , a method of using an elastomer plating mask as a chip-scale package of the present invention in detail.

[0019] First please refer to Figure 2A , on the wafer 100 on which the solder pads 102 have been formed, first cover a protective layer 104, such as a polyimide (polyimide) protective layer, the protective layer 104 roughly exposes the area of ​​the solder pads 102, and then coat the protective layer 104 , forming an under-bump metal layer 106 on the wafer 100 and the bonding pad 102 under the solder bump to be formed, which is used to prevent the diffusion of other metal materials subsequently formed above it.

[0020] Please refer t...

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PUM

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Abstract

The invention provides a method of using an elastomer electroplating mask as a chip-level package, which includes: providing a wafer on which a welding pad has been formed; covering the wafer with a protective layer, the protective layer substantially exposing the solder pad; forming an elastomeric layer on the sheath, an opening of the elastomeric layer substantially corresponding to the soldering pad; electroplating a solder in the opening of the elastomeric layer; and performing a thermal reflow process, The solder is turned into a solder bump, and the elastomer layer is cured into a stress buffer layer. A patterned UBM layer is then formed on it to prevent metal diffusion. The UBM layer roughly corresponds to the pad and extends to the dicing lane of the wafer. The method can improve the waste of photoresist material and the complexity of the manufacturing process, and reduce the cost of the manufacturing process.

Description

technical field [0001] The present invention relates to a method of using an elastomer (elastomer) electroplating mask as a wafer level package (waferlevel package), in particular to a method that can combine the electroplating process and the packaging process. Background technique [0002] After the bonding pad and protective layer are fabricated on the wafer, the encapsulation process must be carried out to protect the various components and interconnection lines formed, and to enable the components to have paths (I / O) connected to the substrate. A common package manufacturing process is to use flip-chip technology to connect solder bumps formed on pads to the substrate. In flip-chip technology, there are three main methods for forming solder bumps: solder ball mounting, stencil printing, and electroplating. The commonly used method is the electroplating method, because the solder bumps obtained by the electroplating method can obtain higher density pins (pins) and small...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/288H01L21/60H01L23/31H01L23/485
CPCH01L21/2885H01L23/3114H01L23/3171H01L24/03H01L24/11H01L24/12H01L24/16H01L2224/0401H01L2224/05572H01L2224/1148H01L2224/13022H01L2224/13099H01L2924/0002H01L2924/01005H01L2924/01006H01L2924/01007H01L2924/01013H01L2924/01014H01L2924/01015H01L2924/01018H01L2924/01022H01L2924/01024H01L2924/01028H01L2924/01029H01L2924/01033H01L2924/0105H01L2924/01057H01L2924/01075H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01084H01L2924/014H01L2924/04941H01L2924/05042H01L2924/14H01L2924/181H01L2924/351H01L2224/05552H01L2924/00
Inventor 游秀美周根申许顺良
Owner TAIWAN SEMICON MFG CO LTD
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