Synchronous circuit

Abstract

A synchronization circuit comprises a state detection circuit for outputting a control signal according to the temporal relationship between a transition point of an input signal and an edge of a synchronization clock; a delay selection circuit for adding a delay to the input signal on the basis of the control signal; and a latch circuit for synchronizing the signal outputted from the delay selection circuit with the synchronization clock. Therefore, synchronization of the input signal can be carried out without adding latency to the input signal.

Description

Technical field [0001] The present invention relates to a synchronous circuit that synchronizes an asynchronously input signal with a clock in a digital signal transmission device. Background technique [0002] The conventional synchronous circuit outputs the asynchronously input signal in synchronization with the synchronous clock (refer to Patent Documents 1 and 2), which is used below Figure 17 Be explained. [0003] Figure 17 It is a block diagram showing the structure of a conventional synchronization circuit. [0004] Figure 17 In the flip-flop 1, the input signal SIN asynchronous with respect to the synchronization clock SCK and the inverted clock nSCK output from the inverter 5 are input, and the input signal SIN is held and output at the timing of the rising edge of the inverted clock nSCK. The flip-flop 2 receives the input signal SIN and the synchronization clock SCK as inputs, and holds and outputs the above-mentioned input signal SIN at the timing of the rising ...

AI Technical Summary

Problems solved by technology

[0014] However, since the switching control circuit 6 detects that the transition point of the asynchronous signal SIN is close to the edge of the synchronous clock SCK, the signal latched at the inverted clock nSCK has already been output from the selection circuit 4, and is activated in the third flip-flop In 3, the synchronous clock SCK is latched again, so there will be problems such as additional waiting time (latency)

[0015] In addition, in multi-channel digital transmission in recent years, many asynchronous signals are input. As these multiple input signals become faster, skew between signals becomes a problem in data transmission.

However, in the conventional technology, since there is a possibility of adding a waiting time for each signal, it becomes a big problem in data transmission that requires error-free signal synchronization.

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