Process for preparing shallow-channel isolating structure

Abstract

A process for preparing shallow channel isolating structure includes such steps as providing a substrate, generating pad oxide layer and mask layer on the substrate, generating channel in substrate, chemical gas-phase deposition with high etch / deposition ratio (about 0.15-0.6) by high-density plasma to generate insualting layer to cover the substrate and fully filling the channel, removing the insulating layer except the channel, and removing mask layer and pad oxide layer.

Description

technical field [0001] The present invention relates to a manufacturing method of an electrically insulating (Electrically insulating) structure, and in particular to a manufacturing method of a shallow trench isolation (Shallow Trench Isolation, STI) structure. Background technique [0002] With the increasing integration of semiconductor devices, the design scale of the devices is shrinking day by day, and the electrical insulation structure in the device, such as the silicon oxide insulating layer, cannot be manufactured by Local Oxidation (LOCOS). One of the most widely used methods today is to manufacture electrical isolation structures by forming shallow trench isolation structures. [0003] Since the High Density Plasma Chemical Vapor Deposition (HDPCVD) method has two functions of "etching" and "deposition", the etching reaction of peeling off the deposit will also be carried out during the deposition, so that The high-density plasma chemical vapor deposition method...

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Problems solved by technology

However, the defects 112 formed during the deposition of the insulating oxide layer 110 are voids that cannot be filled with silicon oxide. , so the formed shallow trench isolation structure 114 will form a recess 116 exposing the top corner of the substrate 100 at the position of the original defect point 112

[0009] Moreover, in the above process, the formed recess 116 will expose the substrate 100 at the corners of the STI structure, so that the exposed part of the substrate 100 is extremely vulnerable to damage in subsequent processes.

[0010] In addition, the components formed in the subsequent process will accumulate charges in the recess 116, which will cause the sub-threshold leakage current phenomenon of the components in the integrated circuit, so that the threshold threshold voltage of the gate oxide layer will be reduced.

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