Method for defining parallel dual butterfly computation fast Fourier transform processor structure

Abstract

The present invention relates to an improvement on core unit in fast Fourier transform processor-butterfly computation unit to obtain concurrent double butterfly computation processing method. The method includes the following steps: firstly, making concurrent butterfly computation processing, i.e. cocurrently making processing only containing adder and processing not only containing multiplier, but also containing adder to obtain cocurrent butterfly computation structure, then making double butterfly computation processing, i.e. according to the correspondent rotation factor group processinginput of butterfly computation unit, then according to that in the butterfly computation processing the multiplier is contained or not using two butterfly computation processing units to process the inputted data so as to obtain the concurrent double butterfly computation fast Fourier transform processor structure.

Description

technical field [0001] The invention relates to a method for determining the structure of a fast Fourier transform processor, in particular to a method for determining the structure of a parallel double-butterfly fast Fourier transform processor, which belongs to the field of information technology. Background technique [0002] Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier technology, which divides a wideband channel into several orthogonal narrowband sub-channels, and transmits information on each sub-channel simultaneously, thereby improving the channel utilization rate. Moreover, inter-symbol interference is reduced by adding a cyclic prefix, which enhances the ability of the system to resist multipath interference. In recent years, OFDM technology has been more and more widely used because of its excellent performance. Not only has it been successfully applied in digital TV and digital audio broadcasting, but also wireless local area network sta...

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Problems solved by technology

The traditional single-memory structure and dual-memory structure occupy less hardware resources, but the throughput is low and requires a higher clock frequency

In order to effectively improve the calculation speed of FFT, it was found through literature search that Byung S.Son et al. published an article "High-speed FFT Processor forOFDM Systems" (high-speed FFT processor in OFDM systems, IEEE International Conference on Circuits and Systems), this paper proposes a single-memory grouping scheme based on the traditional single-memory structure, which greatly improves the operation speed of the FFT processor and occupies Smaller memory, but increased addressing complexity and complex multiplier consumption, thus occupying more hardware resources

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