Dynamic random access memory and fabrication thereof

A dynamic random access and storage unit technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve the problems of increasing the integration of dynamic random access memory components, increasing the surface area of ​​capacitors, difficult capacitors, etc., to achieve Improve storage capacity, increase integration, high integration effect

Active Publication Date: 2005-03-23
PROMOS TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Therefore, the object of the present invention is to provide a dynamic random access memory unit, wherein the capacitor is formed on the side wall of the semiconductor pillar, to solve the problem that the existing trench type dynamic random access memory is difficult to fill the capacitor, and can increase the surface area of

Method used

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  • Dynamic random access memory and fabrication thereof
  • Dynamic random access memory and fabrication thereof
  • Dynamic random access memory and fabrication thereof

Examples

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Example Embodiment

[0044] Figure 1 to Figure 16 It shows a manufacturing flow chart of a dynamic random access memory (Dynamic Random Access Memory, DRAM) array according to a preferred embodiment of the present invention. figure 1 A perspective view showing the arrangement of this DRAM array clearly, Figure 2 to Figure 9 , Figure 11 to Figure 13 as well as Figure 16 (a) Yes figure 1 A cross-sectional view of the I-I′ position, and Figure 16 (b) is figure 1 Another cross-sectional view of the I-I' part. Picture 10 , Figure 14 as well as Figure 15 It is the top view.

[0045] If we explain in a more specific way, then figure 1 Figure 6 shows the manufacturing flow chart of the capacitor of the DRAM array, Figure 7 to Figure 12 It shows the manufacturing flow chart of the vertical transistor of the DRAM array, and Figure 13 to Figure 16 It is a manufacturing flow chart of subsequent manufacturing processes, including the manufacturing flow chart of bit lines and word lines.

[0046]

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Abstract

A dynamic random access memory (DRAM) cell is described, including a semiconductor pillar on a substrate, a capacitor on a lower portion of a sidewall of the pillar, and a vertical transistor on an upper portion of the sidewall of the pillar. The vertical transistor includes a first doped region, a second doped region, a gate and a gate insulating layer. The first doped region is located in the sidewall and is coupled with the capacitor. The second doped region is located in a top portion of the pillar. The gate is disposed on the sidewall of the pillar between the first and the second doped regions, and the gate insulating layer is disposed between the sidewall and the gate.

Description

technical field [0001] The present invention relates to a semiconductor element, in particular to a dynamic random access memory cell (Dynamic Random Access Memory cell, DRAM cell) and a manufacturing method thereof. Background technique [0002] In the semiconductor industry, DRAM is an important integrated circuit that is constantly being researched and developed. At present, researches on increasing the storage capacitance of the DRAM unit, improving the read and write speed of the DRAM unit, and reducing the device size of the DRAM unit have continuously obtained many achievements. A DRAM cell usually includes a transistor and a capacitor controlled by the transistor. Generally speaking, the design of DRAM cells can be divided into three types, which are called planar, capacitive stack and trench. In the design of a planar DRAM cell, both transistors and capacitors are planar components, while in the design of a capacitor-stacked DRAM cell, capacitors are arranged on t...

Claims

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Application Information

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IPC IPC(8): H01L21/8242H01L27/108
Inventor 王廷熏
Owner PROMOS TECH INC
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