Non volatile memory cell

Abstract

A non-volatile memory cell which can be easily integrated into processes for forming DRAM cells using trench capacitors is disclosed. The non-volatile memory cell comprises a transistor formed in a trench created below the top surface of the substrate. The transistor includes a U-shaped floating gate which lines the trench. A dielectric layer surrounds the floating gate, isolating it from the trench sidewalls and bottom as well as a control gate located in the inner trench formed by the floating gate. A buried diffusion region abuts the bottom of the floating gate. First and second diffusion regions are located on first and second sides of the trench. The first diffusion region is on the surface of the substrate while the second diffusion region extends from the surface and couples to the buried diffusion region. A wordline is coupled to the control gate.

Description

technical field [0001] The present invention relates to integrated circuits (ICs), and more particularly, the present invention relates to a non-volatile memory cell. Background technique [0002] Non-volatile memory ICs, such as Electronically Erasable Programmable Read-Only Memory (EEPROMs), or flash memory, are used to store digital information, and non-volatile memory ICs maintain storage in memory The information in the unit, even after the power has been removed or interrupted, there are various applications that use non-volatile memory, for example, a digital camera, or a hard disk replacement for a personal computer (PC), In some applications, such as system-on-chip (SoC), it is necessary to integrate non-volatile and non-volatile memory on the same IC. [0003] However, the techniques conventionally used to form nonvolatile memory cells are very complex and, moreover, such procedures are quite different from those used to form volatile memory cells, such as dynamic...

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Problems solved by technology

[0003] However, the techniques conventionally used to form nonvolatile memory cells are very complex and, moreover, such procedures are quite different from those used to form volatile memory cells, such as dynamic random access memories (DRAMs). Therefore, it is very difficult and costly to integrate the two types of memory cells on a single IC

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