Wafer defect management method

Abstract

This invention provides one crystal deficiency management method, which comprise the following steps: testing each chip on the crystal deficiency original data; integrating the original data to generate one crystal deficiency distribution data to record each deficiency point distribution position, shape and size; drawing one relative pattern film according to the crystal deficiency slice to take in distribution status; transmitting the pattern film to one terminal machine to make it not receive original data to display the pattern file to the user.

Description

technical field [0001] The present invention relates to a wafer defect management method, in particular to a wafer defect management method that draws corresponding graphics files in advance according to wafer defect data on a server host to reduce computing requirements of a manager's terminal. Background technique [0002] In the semiconductor manufacturing process, after the wafer is processed by the semiconductor machine, the semiconductor manufacturer will perform defect inspection (defect inspection, such as bright field or dark field defect inspection) on the processed wafer to improve the finished product of the wafer in the manufacturing process Rate (yield). This type of inspection is mostly performed on the basis of each chip on the wafer. When testing, the detection machine will use a given position on a chip as a reference position, and use the detection result of this reference position as a reference value to measure the relative position of other positions o...

AI Technical Summary

Problems solved by technology

However, with the improvement of the resolution of the defect detection machine and the expansion of the wafer size, a large amount of original defect point data will be generated after defect detection

As is well known to those skilled in the art, the hardware resources of the terminal are usually not sufficient, not only cannot effectively store a large amount of original defect point data, but also it is difficult to efficiently perform integrated data processing

Moreover, the defect point distribution of the same chip may need to be notified to many engineers at different terminal terminals. If each terminal terminal needs to perform its own integrated data processing, it will waste the hardware resources of each terminal repeatedly. , leading to ineffective management

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