Receiver circuit, differential signal receiver circuit, interface circuit, and electronic instrument
A technology of receiving circuit and differential signal, which is applied in the field of receiving circuit to achieve the effect of reducing amplitude and reducing capacity
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the Examples described below do not unduly limit the contents of the present invention described in the claims. Furthermore, not all of the configurations described below are necessarily essential requirements for constituting the present invention.
[0044] The receiving circuit in this embodiment described below is applicable to a single-ended signal receiving circuit or a differential signal receiving circuit.
[0045] 1. Interface circuit for single-ended signals
[0046] 1.1 Interface circuit
[0047] figure 1 A schematic configuration of an interface circuit for single-ended signals in this embodiment is shown. In addition, in this embodiment, the host device 10 is the end that supplies the clock signal, and the target device 30 is the end that operates using the supplied clock signal as the system clock signal.
[0048] exist figure 1 A...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 