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Integrated circuit and method for memory access control

A technology of memory controllers and integrated circuits, which can be used in instruments, electrical digital data processing, sustainable buildings, etc., and can solve serious power consumption problems

Inactive Publication Date: 2007-03-14
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the power dissipation in such a system will still be quite

Method used

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  • Integrated circuit and method for memory access control
  • Integrated circuit and method for memory access control
  • Integrated circuit and method for memory access control

Examples

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Embodiment Construction

[0027] FIG. 1A shows a block diagram of a system-on-chip according to a first embodiment of the present invention. Specifically, a main processor PROC, a memory controller MC, a dynamic random access memory device MM and an interconnection device IM connecting the main processor PROC and the memory controller MC are described. In addition to the elements shown, a system-on-chip may include additional coprocessors, additional memory, and other elements. However, these elements are not shown in FIG. 1 since they are not required to understand the basic principles of the invention.

[0028] The main processor PROC is programmable, the memory means MM can be implemented as a standard SDRAM memory, the memory controller MC can be a programmable memory controller, and the application program APL running on the main processor PROC should be able to return information about its memory Some kind of feedback on expected usage. One example of an application APL is audio / video playback....

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Abstract

An integrated circuit comprising at least one processing module (PROC) for processing an application (APL) requiring specific communication parameter, at least one dynamic random access memory means (MM) for storing data, wherein the memory means (MM) is operable by a plurality of predefined operating modes, is provided. Additionally, at least one memory access selection means (SM) for selecting one of said plurality of predefined operating modes based on said communication parameters and at least one memory controller (MC) for controlling the access of said at least one dynamic random access memory means (MM) according to said predefined operating modes selected by said memory access selecting means (SM) is provided. Each of said memory controller (MC) are associated to one of the dynamic random access means (MM). An interconnect means (IM) couples the processing modules (PROC) and the memory controller (MC), such that the communication over the interconnect means (IM) is achieved.

Description

technical field [0001] The invention relates to integrated circuits, methods for memory access control, and data processing systems. Background technique [0002] Certain mobile terminals provide their functionality based on peripheral components such as portable audio players (audio subsystem and CD or solid-state memory), mobile phones (GSM modem and voice codec), palmtop managers (touch screen + microprocessor) or solid state camera (camera + display + solid state memory). The variety of said different subsystems, such as peripheral components, is steadily increasing. The different subsystems have evolved independently of each other and rapidly become more advanced and more complex, resulting in a steady increase in their performance parameters such as bit rate, capacity, resolution, quality and reduced power consumption. [0003] In the aforementioned portable devices, dynamic random access memories such as SDRAM, DDR-SDRAM and DRAM are often used due to their low cost...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16G06F13/14
CPCY02B60/1228G06F13/1694Y02D10/00
Inventor 阿图尔·T.·布尔夏德弗朗索瓦丝·J.·哈姆斯泽
Owner NXP BV