Memory

Abstract

This memory comprises: a first frequency detecting portion detecting access frequencies with respect to a plurality of memory cell blocks respectively, a comparator comparing the access frequencies with respect to the plurality of memory cell blocks detected by the first frequency detecting portion with each other, and a refresh portion exercising control for selecting a prescribed memory cell block from among the plurality of memory cell blocks on the basis of comparison data output from the comparator and preferentially rewriting data in the memory cells included in the selected memory cell block.

Description

technical field [0001] The present invention relates to a memory, and more particularly to a memory including an update unit for rewriting memory cells. Background technique [0002] Conventionally, it is known that in a ferroelectric memory, when a rewrite operation and a write operation are performed after a read operation of a memory cell including a ferroelectric capacitor, since a word line connected to a word line other than the selected word line When a predetermined voltage is applied to the memory cell, the polarization amount of the ferroelectric capacitor decreases, resulting in a disturbance phenomenon in which data is lost. In order to suppress such disturbances, conventionally known ferroelectric memories include a refresh unit that controls so as to rewrite (refresh) memory cells including ferroelectric capacitors. In such a conventional ferroelectric memory, when the number of accesses to all the memory cells reaches a predetermined number of times, by using...

AI Technical Summary

Problems solved by technology

[0006] However, in the aforementioned Japanese Unexamined Patent Application Publication No. 2003-7051, there is a problem in that accesses to memory cell blocks are prioritized in the order in which the number of accesses to the plurality of memory cell blocks reaches the predetermined number of times required for the update operation. update action

Therefore, even while the refresh operation is performed on the first memory cell block whose access count has reached the predetermined number of times required for the refresh operation, for example, the fourth memory cell block whose access count has reached the predetermined count required for the refresh operation is intensively refreshed. In the case of action, in JP-A-2003-7051, since it is the fourth memory cell block whose access times reach the specified number of times required for the update action, the update action will be performed, so this will occur. The fourth problem is that the access operation of the memory cell block whose access frequency has reached the specified number of times required for the update operation far exceeds the specified number of times required for the update operation

As a result, since the disturbance accumulated in the memory cells included in the fourth memory cell block whose number of accesses has reached the specified number of times required for the refresh operation increases, the problem of data disappearance due to disturbances arises.

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