Method and apparatus for operating series nonvolatile memory unit

A non-volatile storage, non-volatile technology, applied in the field of electrically erasable programmable non-volatile memory

Inactive Publication Date: 2007-04-18
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The reverse read operation is a source of energy loss resulting in energy dissipation that would similarly occur in the read operation which depends on the extent to which lateral current flows through the channel in the memory cell

Method used

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  • Method and apparatus for operating series nonvolatile memory unit
  • Method and apparatus for operating series nonvolatile memory unit
  • Method and apparatus for operating series nonvolatile memory unit

Examples

Experimental program
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Embodiment Construction

[0067] FIG. 1A is a schematic diagram of a charge trapping memory cell, showing a read operation performed on a portion of the charge trapping structure corresponding to a source terminal. P-type doped substrate region 170 includes n+ doped source and drain regions 150 and 160 . The remaining memory cells include a bottom dielectric structure 140 on the substrate, a charge trapping structure 130 on the bottom dielectric structure 140 (bottom oxide layer), a top dielectric structure 120 (top oxide layer) on the charge trapping structure 130 ), and the gate 110 on the oxide structure (should be a top dielectric structure) 120 . A typical top dielectric structure consists of about 5 to 10 nanometers thick silicon dioxide and silicon oxynitride, or other similar high dielectric constant materials such as aluminum oxide (Al 2 o 3 ). Typical bottom dielectric structures include silicon dioxide and silicon oxynitride, or other similar high dielectric constant materials, about 3 to...

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PUM

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Abstract

The invention relates to read of a memory cell with a charge storage structure, performed by measuring current between one carrier current node and substrate region of the memory cell. When the other parts of the memory cell store irrelated data, the read operation reduces coupling between charge capturing structures of different parts. Thus, the sensing range of the memory cell can be remarkably improved. And the invention also provides a series memory cell and a series memory cell array.

Description

technical field [0001] The present invention relates to electrically erasable programmable non-volatile memory, and more particularly to a charge trapping memory with a bias arrangement that is quite sensitive to reading the charge trapping structure of memory cells at different locations. Background technique [0002] At present, in the electronic programming and erasing non-volatile storage technology, the charge storage structure used in various fields is mainly used, such as the known electrically erasable programmable read-only memory (EEPROM) and flash memory, and some memory cell structures It can be used in electrically erasable programmable read-only memory and flash memory. As the size of integrated circuits shrinks, memory cell structures based on charge-trapping dielectric material layers are gradually attracting attention because they can be mass-produced and the process is simple. Various memory cell structures based on charge-trapping dielectric material laye...

Claims

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Application Information

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IPC IPC(8): H01L27/105H01L27/115H01L29/78G11C16/02
Inventor 叶致锴
Owner MACRONIX INT CO LTD
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