Term addressable memory of an accelerator system and method

Inactive Publication Date: 2001-09-27
JOLITZ LYNNE G
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  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

0016] The invention implements continuous flow (streamed) information delivery via a standard protocol such as (TCP/IP) by means of a pattern match via associative memory. It has several benefits in processing standard protocols, as opposed to non-standard protocols. These include absolute minimum latency between application and network medium (fiber), absolute maximum bandwidth between communicating network applications, low complexity design network protocol processing mechanism, and the protocol rate scales linearly with network signaling rate.
0017] These and other benefits are obtained, in one aspect, by avoiding software and hardware processing steps via an isochronous "stimulus/response" architecture using a variable content addressable me

Problems solved by technology

If this data protocol handling must be handled in software, then there are fundamental issues in logic and software design that wil

Method used

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[0026] The invention is particularly adaptable to TCP / IP protocols and will be described in that context. It will be appreciated, however, that the invention has greater utility and is applicable to other streamed protocols.

[0027] Computer networks use network software protocols to communicate information reliably between computers over multiple successive physical signaling mediums. These protocols are implemented in software on computer processors. While hardware signaling rates have steadily increased, software protocol processing has not kept pace. With the advent of gigabit networking technology, costly processors must be dedicated to providing at most 40-50 percent of the theoretical bandwidth of the network, while software implementations used with earlier signaling technologies were capable of 60-80 percent of theoretical bandwidth. Clearly bandwidth demands will continue to increase, and since the disparity between software protocol processing and signaling rates will also ...

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Abstract

An improved term addressable memory of an accelerator system and method includes a mechanism for performing predetermined plurality of pattern matches of packets to classify them for use with stateful protocol processing units that can resolve session data spread across multiple data packets and process them for the ultimate destination. The invention replaces a conventional content addressable memory with a term addressable memory, whereby redundant terms are recorded with a single memory entry. Two classes of terms are used to match packet addresses and application ports, as well as a much smaller session CAM that matches the aggregate match of all terms to a specific session.

Description

SCOPE OF THE INVENTION[0001] In the above-identified application, there is described and claimed a network accelerator and method for TCP / IP that includes programmable logic for performing network protocol processing at network signaling rates. The programmable logic is configured in a parallel pipelined a architecture controlled by state machines and implements processing for predictable patterns of the majority of transmissions. In more detail, incoming packets are compared with patterns corresponding to classes of transmissions which are stored in a content addressable memory and are simultaneously stored in a dual port, dual bank application memory. The patterns are used to determine sessions to which an incoming IP datagram belongs, and data packets stored in the application memory are processed by the programmable logic. Processing of packet headers is performed in parallel and during memory transfer without the necessity of conventional store and forward techniques resulting ...

Claims

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Application Information

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IPC IPC(8): H04L29/06
CPCH04L29/06H04L69/16H04L69/22H04L69/161Y10S707/99936Y10S707/99935H04L9/40
Inventor JOLITZ, LYNNE G.
Owner JOLITZ LYNNE G
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