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Programming method for electrical fuse cell and circuit thereof

a technology of electrical fuse cells and circuits, applied in the field of programming methods, can solve the problems of limited density of structures on the semiconductor device, significant risk that at least some of those memory cells will be defective when fabricated, and thermal damage to adjoining circuitry of the i

Inactive Publication Date: 2005-10-27
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides an electrical fuse cell solution and programming scheme for the single core design approach. The invention includes a programming method for fuse cells and a circuit for programming and reading an electrical fuse link. The technical effects of the invention include improved programming precision and reliability, as well as simplified circuit design and programming process.

Problems solved by technology

With such a large number of memory cells, there is a significant risk that at least some of those memory cells will be defective when fabricated.
However, the large energy of the laser beam presents the possibility of thermal damage to adjoining circuitry of the IC.
Thus, the density of structures on the semiconductor device may be limited.
To provide laser beams with precise location and appropriate diameter, the cost of the laser beam generator is uneconomical.

Method used

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  • Programming method for electrical fuse cell and circuit thereof
  • Programming method for electrical fuse cell and circuit thereof
  • Programming method for electrical fuse cell and circuit thereof

Examples

Experimental program
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Embodiment Construction

[0022]FIG. 2 is a schematic diagram of voltage applied to the fuse cell in program mode as being selected and in read mode, respectively. The electrical fuse 20 is coupled to a driver device 30, and the core circuit 40 is coupled to the connection point of the electrical fuse 20 and the driver device 30. Here, electrical fuse 20 and the driver device 30 comprise an electrical fuse cell. The electrical fuse cell is used for memory repair, chip ID setting or resistor trimming in chip design implementation, depending on the type of the core circuit 40. It is noted that the electrical fuse cell and the core circuit 40 are operated at an operating voltage VCC during normal operation. In addition, if the electrical fuse cell, which includes the electrical fuse 20 and the driver device 30, is in program mode, programming voltage VPP is applied to the electrical fuse 20, and the voltage applied to the control gate 32A of switch device 32 is between 0.5 times the operating voltage VCC and pr...

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PUM

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Abstract

A programming method for fuse cells. A core circuit is applied with a first power voltage. The fuse cell includes an electrical fuse element connected to a common node, and a driver device connected between the electrical fuse element and a ground node. The ground node has a ground voltage. The fuse cell has a control gate for controlling current through the electrical fuse element. In program mode, a second power voltage is applied to the common node, a first control voltage is applied to the control gate of a selected fuse cell and a second control voltage is applied to the control gate of an unselected fuse cell. In read mode, the first power voltage is applied to the common node. The second power voltage exceeds the first power voltage. The second control voltage exceeds the ground voltage. The second control voltage is also lower than the first control voltage.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present disclosure relates in general to a programming method. In particular, the present disclosure relates to a programming method for electrical fuse cells and a circuit using the method. [0003] 2. Description of the Related Art [0004] Fuse links are frequently used in conjunction with redundant memory cells of memory ICs or embedded memory segments in application specific integrated circuits (ASICs) or system level integrated circuits (SLICs). If a memory cell is defective, a redundant memory cell is substituted and the defective memory cell is disconnected. It is not unusual for IC memory chips or memory segments of ASICs or SLICs to be formed by hundreds of thousands, or millions, of such memory cells. With such a large number of memory cells, there is a significant risk that at least some of those memory cells will be defective when fabricated. Using programmable fuse link structures in memory segments of...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C7/00G11C17/18
CPCG11C17/18
Inventor WU, SHIEN-YANGLIAW, JHON-JHY
Owner TAIWAN SEMICON MFG CO LTD