Multi-level semiconductor module

Abstract

A semiconductor module is formed by alternately stacking resin boards on which semiconductor chips are mounted and sheet members having openings larger than the semiconductor chips and bonded to the resin boards. One of the resin boards located at the bottom has a thickness larger than that of each of the other resin boards. First buried conductors formed in each of first resin boards are arranged to form a plurality of lines surrounding a region on which a semiconductor chip is to be mounted. The spacing between the first buried conductors increases in succession toward the outermost line. Second buried conductors formed in each of sheet members are arranged to form a plurality of lines surrounding an opening. The spacing between the second buried conductors increases in succession toward the outermost line.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application claims priority under 35 U.S.C. §119(a) on Patent Application No. 2004-364570 filed in Japan on Feb. 16, 2004, the entire contents of which are hereby incorporated by reference. BACKGROUND OF THE INVENTION [0002] (1) Field of the Invention [0003] The present invention relates to three-dimensional multi-level semiconductor modules formed by alternately stacking sheet members and resin boards on which semiconductor chips are mounted. [0004] (2) Description of the Related Art [0005] With demands for size reduction and performance improvement of various electronic devices such as cellular phones and digital cameras, multi-level semiconductor modules formed by stacking and uniting a plurality of electronic components, especially semiconductor chips, have been proposed. [0006] Methods for easily manufacturing such multi-level semiconductor modules at low cost have been proposed to date. [0007] A conventional semiconductor modu...

AI Technical Summary

Benefits of technology

[0010] In recent years, techniques for reducing the thickness of semiconductor chips by polishing and techniques for mounting the thin semiconductor chips on boards with high yields have been developed, so that the number of levels of such stacked semiconductor chips has been further increasing. In addition, in a semiconductor memory, for example, as the memory capacity increases, the chip area increases. If a module is formed by stacking large semiconductor chips in multiple levels, the problem of a warp of the module arises. The degree of warp of the module increases as the thickness of a printed board decreases. Accordingly, to stack printed boards on which semiconductor chips are mounted and interlayer members in multiple levels, it is important to suppress the occurrence of a warp.

Problems solved by technology

If a module is formed by stacking large semiconductor chips in multiple levels, the problem of a warp of the module arises.

Accordingly, if a warp occurs at room temperature or is caused by heating during bonding, a semiconductor module cannot be mounted on the mother board or the warp causes a partial failure in packaging.

That is, a semiconductor module can be defective in packaging though it is non-defective in its electric characteristics.

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