Architecture of an encryption circuit implementing various types of encryption algorithms simultaneously without a loss of performance

a technology of encryption circuit and architecture, applied in the field of encryption, can solve the problems of high development cost of a solution that remains, and the lack of architectures that are capable of executing a set of algorithms, and achieve the effect of fast execution of the principal encryption algorithms, without loss of performan

Inactive Publication Date: 2007-09-27
LE QUERE PATRICK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0014] The first advantage of the invention is that it allows fast execution of the principal encryption algorithms with two levels of parallelism, a first parallelism of the operations performed by the input / output module and the encryption module, and a second parallelism in the execution of the various encryption algorithms.
[0015] Another advantage of the invention is to make invisible to the host system all of the encryption resources made available to the system, and to provide protected storage for secrets such as keys and certificates. The sensitive functions of the card (algorithms and keys) are all located inside the encryption module and are inaccessible from the PCI bus.
[0016] The invention also has the advantage of enabling hardware and software implementations of various encryption algorithms to coexist without a loss of performance, while guaranteeing the throughputs of each of them.
[0017] It has the further advantage of being scalable by a choice of standard microprocessor and programmable logic technologies, as opposed to more conventional implementations based on specific circuits (ASIC). The invention makes it possible, in particular, to implement proprietary algorithms simply by modifying the code of the encryption processors or by loading a new configuration file for the encryption automata of the encryption module.

Problems solved by technology

There are known implementations of security architectures based on ASIC (Application Specific Integrated Circuit) components, which entail high development costs for a solution that remains inflexible, both on the manufacturer end and on the user end.
Furthermore, there is no architecture existing today that is capable of executing a set of algorithms simultaneously with a guaranteed throughput for each of them.

Method used

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  • Architecture of an encryption circuit implementing various types of encryption algorithms simultaneously without a loss of performance
  • Architecture of an encryption circuit implementing various types of encryption algorithms simultaneously without a loss of performance

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Embodiment Construction

[0019] For simplicity's sake, the encryption / decryption module will hereinafter be called the “encryption module.”

[0020] The links between each module are all two-way links unless indicated.

[0021] The encryption circuit 1 according to the invention hinges on two main modules: [0022] an input / output module 2 responsible for the data exchanges between the encryption resources and a host system HS via a PCI bus; and [0023] an encryption module 3 in charge of the encryption and decryption operations as well as the storage of the secrets.

[0024] These two modules 2 and 3, respectively delimited by an enclosing dot-and-dash line, dialogue via a dual-port memory DPR 4 that allows the exchange of data and commands / statuses between the two modules 2 and 3.

[0025] A serial link SL controlled by the encryption module 3 also makes it possible to input the basic keys through a secure path SP independent of the normal functional path (PCI bus), thus meeting the requirement imposed by the FIPS 14...

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Abstract

An encryption circuit for simultaneously processing various encryption algorithms, the circuit being capable of being coupled with a host system hosted by a computing machine. The circuit comprises an input / output module responsible for the data exchanges between the host system and the circuit via a dedicated bus. An encryption module coupled with the input / output module is in charge of the encryption and decryption operations. Isolation means between the input / output module and the encryption module makes the sensitive information stored in the encryption module inaccessible to the host system and ensures the parallelism of the operations performed by the input / output module and the encryption module. The circuit is supported on a peripheral component interconnect card. The circuit is specifically adapted to provide “hardware” protection of computer servers or stations.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of application Ser. No. 09 / 706,728, filed Nov. 7, 2000, which claims priority under 35 U.S.C. §119 to French Application No. 9914067, filed Nov. 9, 1999, each of which is hereby incorporated by reference.FIELD OF THE INVENTION [0002] The present invention applies to the field of encryption, and more particularly, relates to an architecture of an encryption circuit implementing various types of encryption algorithms simultaneously. [0003] This architecture is embodied by a circuit supported by a PCI (Peripheral Component Interconnect) card, and makes it possible to implement various encryption algorithms in parallel, without a loss of performance in a machine (server or station). It also plays the role of a vault in which the secret elements (keys and certificates) required for any electronic encryption function are stored. DESCRIPTION OF RELATED ART [0004] The increased need for performance in cryptogr...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H04L9/28G06F12/14G06F13/38G06F21/72H04L9/00H04L9/08H04L9/10H04L9/14
CPCH04L9/14G06F21/72
Inventor LE QUERE, PATRICK
Owner LE QUERE PATRICK
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