Non-Volatile Memory With Linear Estimation of Initial Programming Voltage

Abstract

In a non-volatile memory, a selected page on a word line is successively programmed by a series of voltage pulses of a staircase waveform with verifications in between the pulses until the page is verified to a designated pattern. The programming voltage at the time the page is programmed verified will be to estimate the initial value of a starting programming voltage for the page. The estimation is further refined by using the estimate from a first pass in a second pass. Also, when the test is over multiple blocks, sampling of word lines based on similar geometrical locations of the blocks can yield a starting programming voltage optimized for faster programming pages.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is related to the following U.S. patent applications: U.S. application Ser. No. ______, entitled “Method For Non-Volatile Memory With Reduced Erase / Write Cycling During Trimming Of Initial Programming Voltage,” by Yan Li, et al., filed concurrently herewith, on Sep. 12, 2006. U.S. application Ser. No. ______, entitled “Non-Volatile Memory With Reduced Erase / Write Cycling During Trimming Of Initial Programming Voltage,” by Yan Li, et al., filed concurrently herewith, on Sep. 12, 2006. U.S. application Ser. No. ______, entitled “Method For Non-Volatile Memory With Linear Estimation Of Initial Programming Voltage,” by Loc Tu, et al., filed concurrently herewith, on Sep. 12, 2006.FIELD OF THE INVENTION[0002]This invention relates generally to non-volatile semiconductor memory such as electrically erasable programmable read-only memory (EEPROM) and flash EEPROM, and specifically to determining optimum initial programming volta...

AI Technical Summary

Benefits of technology

"The invention relates to a method for estimating the starting voltage for programming a memory array. The method involves running a programming test on a page and using a staircase waveform with verifications in between the pulses to program the page to a designated pattern. The final programming voltage at the time the page is program-verified is used to estimate the starting programming voltage by scaling back a predetermined amount. An average starting programming voltage is obtained by considering a sample of similar page / word lines. The method allows for a simple one- or two-pass programming test on each page and does not involve multiple erase operation during the test. The invention also includes a scheme for obtaining an optimum starting programming voltage for a representative page of a group of word lines with similar programming characteristics. The method has the advantage of minimum storage requirement and does not over-program the faster programming bits. Additionally, the method is not sensitive to the presence of bad blocks where a large portion of the word lines in it may be defective."

Problems solved by technology

Conventional mass storage, based on rotating magnetic medium such as hard drives and floppy disks, is unsuitable for the mobile and handheld environment.

This is because disk drives tend to be bulky, are prone to mechanical failure and have high latency and high power requirements.

These undesirable attributes make disk-based storage impractical in most mobile and portable applications.

If the initial programming voltage VPGM0 is chosen too low, it may require an excessive number of programming pulses to reach the target state.

On the other hand if VPGM0 is chosen too high, especially in a multi-state memory, the programming may overshoot the target state in the first pulse.

Conventional VPGM0 trimmings are therefore performed by memory testers that are expensive dedicated machines.

Non-volatile memory device has a limited life usage due to the endurance-related stress suffered each time the device goes through an erase / program cycle.

The physical phenomenon limiting the endurance of non-volatile memory devices is the trapping of electrons in the active dielectric films of the device.

Thus, conventional VPGM trimmings at the factory could consume as much as several thousand endurance cycles of a memory device.

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