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Platform storage hierarchy with non-volatile random access memory with configurable partitions

a platform storage and random access memory technology, applied in the field of computer systems, can solve the problems of data loss, dram-based memory consumes power, and limiting factors of computer innovation today, and achieve the effect of reducing the cost of dram memory

Inactive Publication Date: 2013-10-17
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a computer system that uses non-volatile memory to improve performance and versatility. The system uses a combination of byte-addressable non-volatile memory and flash memory to store persistent system information and BIOS code. The use of non-volatile memory has advantages over traditional DRAM, such as lower power consumption and faster read times. However, current non-volatile memory technologies have limitations, such as limited speed and capacity, which impact the performance and size of computer systems. The invention proposes the use of phase-change memory (PCM) as a non-volatile memory technology that can offer higher performance and potentially overcome these limitations. The technical effects of the invention include improved performance and versatility of computer systems, as well as the potential to overcome limitations of current non-volatile memory technologies.

Problems solved by technology

One of the limiting factors for computer innovation today is memory and storage technology.
DRAM-based memory consumes power even when no memory reads or writes occur because it must constantly recharge internal capacitors.
DRAM-based memory is volatile, which means data stored in DRAM memory is lost once the power is removed.
These storage devices are block-addressable, which means that a single byte of storage cannot be accessed individually.
These I / O adapters and I / O protocols consume a significant amount of power and can have a significant impact on the die area and the form factor of the platform.
These interconnect and I / O controllers cannot consistently deliver the bandwidth required for a satisfying user experience.
Flash memory devices that are currently available in the market generally have limited speed (e.g., 50 MHz).
However, the processor cache has a very limited amount of capacity.
Thus, the amount of BIOS code that can be used for the initial system configuration is also very limited.
Therefore, the PEI BIOS code cannot be easily extended to support a large mix of memory configurations and multiple processor families.
However, the size of the processor cache cannot be easily increased without a negative impact on the rest of the system.
Flash memory has a number of practical problems which these replacements hope to address.
Additionally, while PCM devices degrade with use (like Flash), they degrade much more slowly.
PCM lifetime is limited by mechanisms such as degradation due to GST thermal expansion during programming, metal (and other material) migration, and other mechanisms.

Method used

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  • Platform storage hierarchy with non-volatile random access memory with configurable partitions
  • Platform storage hierarchy with non-volatile random access memory with configurable partitions
  • Platform storage hierarchy with non-volatile random access memory with configurable partitions

Examples

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first embodiment

[0088]FIG. 5 illustrates an interface between software and storage provided by NVRAM 130 of FIG. 2 according to the invention. In this embodiment, IMC 131 has the additional capability of abstracting NVRAM 130 as traditional non-volatile mass storage (e.g., disks or flash memory) for the software. IMC 131 is coupled to a storage driver 513, which can be implemented in software. To storage driver 513, IMC 131 serves as traditional non-volatile mass storage that is block-addressable. Computer system 200 uses this storage driver 513 as the lowest-level disk driver. In this embodiment, software (OS 512 and applications) can utilize data in NVRAM 130 without modification to the software. That is, data access to a non-resident page (a page not in the system memory) will trigger a page fault and a disk I / O will be performed.

[0089]In the embodiment shown in FIG. 5, when OS 512 initiates a storage I / O (e.g., in response to a page fault to bring in a page that is not resident in the system me...

third embodiment

[0095]FIGS. 8A and 8B illustrate an interface between software and storage provided by NVRAM 130 with the reference to FIG. 6B according to one embodiment of the invention. FIG. 6B illustrates a memory and storage subsystem 682 according to one embodiment of the invention. In the embodiment shown in FIG. 6B, there is no distinction between mass storage and system memory within NVRAM 130. The OS (OS 850 of FIG. 8B) creates a memory-mapped file system, where FM 142 serves as storage for file system 660. It is understood that NVRAM 130 may include more or fewer partitions than what is shown in FIG. 6B (e.g., BIOS NVRAM 160 and / or TPM NVRAM 170 may be absent).

[0096]In a memory-mapped file system, the files used by an application 810 (and are, therefore, in a virtual address space 820 allocated to application 810) can be directly mapped to NVRAM device address space 840. Each address location in NVRAM device address space 840 is directly-addressable by the processor, and is, therefore, “...

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PUM

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Abstract

A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in a platform storage hierarchy. The NVRAM is byte-addressable by the processor and can be configured into one or more partitions, with each partition implementing a different tier of the platform storage hierarchy. The NVRAM can be used as mass storage that can be accessed without a storage driver.

Description

BACKGROUND[0001]1. Field[0002]Embodiments of the invention relate to a computer system; and more specifically, to the use of byte-addressable non-volatile memory in the platform storage hierarchy of a computer system.[0003]2. Description of the Related Art[0004]A. Current Memory and Storage Configurations[0005]One of the limiting factors for computer innovation today is memory and storage technology. In conventional computer systems, system memory is typically implemented by dynamic random access memory (DRAM). DRAM-based memory consumes power even when no memory reads or writes occur because it must constantly recharge internal capacitors. DRAM-based memory is volatile, which means data stored in DRAM memory is lost once the power is removed.[0006]With respect to mass storage, conventional mass storage devices typically include non-volatile magnetic media (e.g., hard disk drives) and / or flash memory (also referred to as “flash”) (e.g., solid state drives (SSDs)). These storage devi...

Claims

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Application Information

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IPC IPC(8): G06F12/02
CPCG06F12/0246G06F12/0638G06F12/0653G06F12/0238G06F9/4401G06F2212/1016G06F2212/1041G06F2212/2024G06F2212/214Y02D10/00
Inventor ZIMMER, VINCENT J.ROTHMAN, MICHAEL A.DORAN, MARK S.
Owner INTEL CORP
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