Comparator circuits with local ramp buffering for a column-parallel single-slope ADC

a comparator circuit and local ramp technology, applied in the field of comparator circuits, can solve the problems of adc non-linearity, variable capacitive load on vsub>ramp /sub>, and low comparator kickback, and achieve constant capacitive load and large input swing.
US20160118992A1Active Publication Date: 2016-04-28TELEDYNE SCI & IMAGING
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
TELEDYNE SCI & IMAGING
Publication Date
2016-04-28

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Abstract

A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed.
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Description

GOVERNMENT LICENSE RIGHTS

[0001] This invention was made with Government support under Contract DE-AC04-94AL85000 awarded by the Department of Energy. The Government has certain rights in the invention.BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This invention relates generally to comparator circuits, and more particularly to comparator circuits used in column-parallel single-slope analog-to-digital converters (ADCs).

[0004] 2. Description of the Related Art

[0005] Image sensors generally include an array of pixels arranged in columns and rows. One common approach to reading out the voltages produced by the pixels in each column is to use column-parallel single-slope ADCs. A typical arrangement is shown in FIG. 1. A voltage from each column, Vin0, Vin1, . . . , Vinx is provided to one input of respective comparators A0, A1, . . . , Ax, each of which also receives a shared (or ‘global’) voltage ramp Vramp produced by a ramp generator 10. During each row readout period, ...

Claims

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