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Method for forming cobalt barrier layer and metal interconnection process

a technology of cobalt barrier layer and metal interconnection, which is applied in the field of semiconductors, can solve the problems of large leakage current of cu interconnection lines, and achieve the effect of reducing the amount of cobalt deposited and improving the selectivity of cobalt deposition

Active Publication Date: 2016-10-13
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach improves cobalt deposition selectivity, reducing leakage current and enhancing the yield and reliability of the product by selectively depositing cobalt on metal interconnection lines while minimizing its presence on the dielectric layer.

Problems solved by technology

However, a more amount of cobalt deposited on the dielectric layer means a larger leakage current of between Cu interconnection lines.

Method used

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  • Method for forming cobalt barrier layer and metal interconnection process
  • Method for forming cobalt barrier layer and metal interconnection process
  • Method for forming cobalt barrier layer and metal interconnection process

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Embodiment Construction

[0025]The present invention will be described in further details hereinafter by referring to the accompanying drawings, so as to provide a better understanding of the present invention. However, the present invention is not limited to these embodiments. All equivalent modifications and substitutions without departing from the spirit and scope of the present invention should be covered by the present invention.

[0026]In a method for forming a cobalt barrier layer of the present invention, a dielectric material film is deposited on a surface of an inter-line dielectric layer by atomic layer deposition. As a result, the surface of the inter-line dielectric layer is densified, on that the cobalt is selectively deposited on surfaces of metal interconnection lines, and hardly deposited on the surface of the inter-line dielectric layer. The underlying principle follows. During atomic layer deposition, the dielectric material will penetrate a skin layer of the inter-line dielectric layer so ...

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Abstract

The present invention provides a method for forming a cobalt barrier layer and a metal interconnection process. The method is performed on a surface of a semiconductor device substrate on which metal interconnection lines and an inter-line dielectric layer are formed, and comprises: depositing a dielectric material film on a surface of the inter-line dielectric layer by atomic layer deposition, to densify the surface of the inter-line dielectric layer; removing the deposited dielectric material film, to expose the metal interconnection lines and the densified surface of the inter-line dielectric layer; selectively depositing cobalt on surfaces of the metal interconnection lines to form a cobalt barrier layer. In the present invention, deposition selectivity of cobalt on surfaces of the metal interconnection lines and the inter-line dielectric layer is improved, thus reducing leakage current between metal interconnection lines and improving yield and reliability of the product.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of China patent application serial No. 201510173198.8, filed Apr. 13, 2015, The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of this specification.FIELD OF THE INVENTION[0002]The present invention relates to the field of semiconductor, and particularly to a method for forming a cobalt barrier layer and a metal interconnection process.BACKGROUND OF THE INVENTION[0003]With the development of fabricating process for CMOS integrated circuits and the reduction in critical dimension, novel materials and processes have been applied to device fabricating processes to improve the performance of devices. In a back end process of integrated circuits, Copper (Cu) lines are used to replace Aluminum (Al) lines, and the interconnection resistance is greatly reduced. At the same time, the use of a porous low-k dielectric material can real...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/768H01L21/02H01L21/285
CPCH01L21/76829H01L21/76865H01L21/02274H01L21/28562H01L21/76843C23C16/04C23C16/14H01L21/76838H01L21/76841H01L21/76846H01L21/76876H01L21/76826H01L21/76849H01L21/76883H01L2221/1047
Inventor LEI, TONGFANG, JINGXUN
Owner SHANGHAI HUALI MICROELECTRONICS CORP