Stacked fan-out package structure

Inactive Publication Date: 2017-04-06
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0008]Another exemplary embodiment of a semiconductor package structure includes a first semiconductor die having a first surface and a second surface opposite thereto. A first RDL structure is disposed on the second surface of the first semiconductor die. A second semiconductor die is disposed on the first RDL structure and has a first surface and a second surface opposite thereto. The second

Problems solved by technology

However, some problems may occur while manufacturing the semiconductor package utilizing the PoP and/o

Method used

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  • Stacked fan-out package structure
  • Stacked fan-out package structure
  • Stacked fan-out package structure

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[0017]The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is determined by reference to the appended claims.

[0018]The present invention will be described with respect to particular embodiments and with reference to certain drawings, but the invention is not limited thereto and is only limited by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated for illustrative purposes and not drawn to scale. The dimensions and the relative dimensions do not correspond to actual dimensions in the practice of the invention.

[0019]FIG. 1 is a cross-sectional view of a semiconductor package structure 10 in accordance with some embodiments of the disclosure. In some embodiments, the semiconductor package st...

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Abstract

A semiconductor package structure is provided. The structure includes a first semiconductor die having a first surface and a second surface opposite thereto. A first molding compound surrounds the first semiconductor die. A first redistribution layer (RDL) structure is disposed on the second surface of the first semiconductor die and laterally extends on the first molding compound. A second semiconductor die is disposed on the first RDL structure and has a first surface and a second surface opposite thereto. A second molding compound surrounds the second semiconductor die. A first protective layer covers a sidewall of the first RDL structure and a sidewall of the first molding compound.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit of U.S. Provisional Application No. 62 / 237,226 filed on Oct. 5, 2015 and U.S. Provisional Application No. 62 / 237,250 filed on Oct. 5, 2015, the entirety of which are incorporated by reference herein.BACKGROUND OF THE INVENTION[0002]Field of the Invention[0003]The present invention relates to a semiconductor package structure, and in particular to a stacked fan-out package structure with high reliability.[0004]Description of the Related Art[0005]In recent years, as electronic products have been become increasingly multifunctional and have been scaled down in size, there is a desire for manufactures of semiconductor devices to make more devices formed on a single semiconductor wafer, so that the electronic products including these devices can be made more compact. Responses to this desire have been the development of the Package-on-package (PoP) technique and wafer level package (WLP) technique. The PoP t...

Claims

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Application Information

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IPC IPC(8): H01L25/065H01L23/00H01L25/00
CPCH01L25/0657H01L25/50H01L23/564H01L2225/06586H01L2225/06572H01L2225/06548H01L2225/06555H01L23/3157H01L24/02H01L2224/023H01L2924/37001H01L2224/02379H01L23/3135H01L21/568H01L23/5389H01L24/19H01L24/20H01L24/94H01L2224/04105H01L2224/12105H01L2224/32145H01L2224/32225H01L2224/73267H01L2224/92244H01L2224/94H01L2924/1431H01L2924/1432H01L2924/1436H01L2924/19011H01L2924/35121H01L2224/19H01L23/49811H01L23/3114H01L25/03H01L2224/83H01L2224/83005
Inventor LIU, NAI-WEILIN, TZU-HUNGPENG, I-HSUANHSIAO, CHING-WENHUANG, WEI-CHE
Owner MEDIATEK INC
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