Semiconductor structure and the method of making the same

Abstract

The present invention provides a semiconductor structure, the semiconductor structure includes a substrate comprising a diffusion region, a transistor structure on the substrate, and a resistive random access memory (RRAM) on the substrate, wherein the resistive random access memory includes at least one metal silicide layer in direct contact with the diffusion region, and a lower electrode, a resistive switching layer and an upper electrode are sequentially disposed on the metal silicide layer.

Description

BACKGROUND OF THE INVENTION1. Field of the Invention[0001]Embodiments of the invention generally relate to a semiconductor structure, and more particularly, to a transistor and a resistive random access memory (hereinafter abbreviated as RRAM) structure and the manufacturing method thereof.2. Description of the Prior Art[0002]Resistive random access memory (RRAM) has a simple structure, low operating voltage, high-speed, good endurance, and CMOS process compatibility. RRAM is the most promising alternative to provide a downsized replacement for traditional flash memory. RRAM is finding wide application in devices such as optical disks and non-volatile memory arrays.[0003]An RRAM cell stores data within a layer of material that can be induced to undergo a phase change. The phase change can be induced within all or part of the layer to switch between a high resistance state and a low resistance state. The resistance state can be queried and interpreted as representing either a “0” or ...

AI Technical Summary

Benefits of technology

The present invention simplifies the manufacturing process by using the same material layer to form the high-k dielectric layer of the transistor and the resistive switching layer in the RRAM. This reduces the number of process steps and integrates the RRAM process with the transistor process.

Problems solved by technology

Upon application of a sufficient voltage, a metallic bridge is induced to form across the data storage layer, which results in the low resistance state.

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