Unlock instant, AI-driven research and patent intelligence for your innovation.

Mos transistor having lower gate-to-source/drain breakdown voltage and one-time programmable memory device using the same

a technology of metal oxides and transistors, applied in the field of metal oxidesemiconductor transistors, can solve the problems of complex sensing amplifiers, soft breakdown of ruptured oxides,

Active Publication Date: 2021-10-14
HEFECHIP CORP LTD
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present disclosure provides a MOS transistor with lower gate-to-source / drain breakdown voltage and OTP memory devices using such MOS transistor. The MOS transistor has a gate dielectric layer with different thicknesses in different regions, which results in lower gate-to-channel breakdown voltage and gated source / drain junction breakdown voltage. The MOS transistor also includes a main gate electrode with two extension gate portions that are in direct contact with the gate dielectric layer. The method for fabricating the MOS transistor includes patterning a first conductive layer into a main gate portion, ion implantation to form drain and source regions, and forming dielectric spacers on the extension gate portions. The technical effects of this disclosure include lower gate-to-source / drain breakdown voltage, improved reliability, and reduced power consumption.

Problems solved by technology

However, some ruptured oxides could be in a soft breakdown condition.
Therefore, a complicate sensing amplifier is often needed to compare the source side and drain side gate oxide leakage currents.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Mos transistor having lower gate-to-source/drain breakdown voltage and one-time programmable memory device using the same
  • Mos transistor having lower gate-to-source/drain breakdown voltage and one-time programmable memory device using the same
  • Mos transistor having lower gate-to-source/drain breakdown voltage and one-time programmable memory device using the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038]Advantages and features of embodiments may be understood more readily by reference to the following detailed description of preferred embodiments and the accompanying drawings. Embodiments may, however, be embodied in many different forms and should not be construed as being limited to those set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey exemplary implementations of embodiments to those skilled in the art, so embodiments will only be defined by the appended claims. Like reference numerals refer to like elements throughout the specification.

[0039]Embodiments are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures). Thus, these embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes. For example, an implanted regi...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A MOS transistor includes a semiconductor substrate, a drain region and a source region in the semiconductor substrate, a channel region between the drain region and the source region, a gate electrode on the channel region, and a gate dielectric layer between the gate electrode and the semiconductor substrate. The gate dielectric layer has different thicknesses. The MOS transistor has a gate-to-source / drain breakdown voltage that is lower than a gate-to-channel breakdown voltage and a gated source / drain junction breakdown voltage.

Description

BACKGROUND OF THE INVENTION1. Field of the Invention[0001]The present disclosure relates generally to the field of semiconductor technology. More particularly, the present disclosure relates to a metal-oxide-semiconductor (MOS) transistor having lower gate-to-source / drain breakdown voltage and one-time programmable (OTP) memory devices using such MOS transistor.2. Description of the Prior Art[0002]As known in the art, non-volatile memory retains stored information even after power is removed from the non-volatile memory circuit. Some non-volatile memory designs permit reprogramming, while other designs only permit one-time programming. Thus, one form of non-volatile memory is a One-Time Programmable (OTP) memory.[0003]An OTP memory may contain an antifuse. An antifuse functions oppositely to a fuse by initially being nonconductive. When programmed, the antifuse becomes conductive. To program an antifuse, a dielectric layer such as an oxide is subjected to a high electric field to ca...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/112H01L21/265H01L21/285H01L29/66
CPCH01L27/11206H01L29/665H01L21/28518H01L21/26513H10B20/25H01L29/66553H01L29/66484H10B20/20
Inventor CHERN, GEENG-CHUAN
Owner HEFECHIP CORP LTD