Bus interface circuit in a semiconductor memory device

Abstract

This invention relates to a bus interface circuit in a semiconductor memory device. This invention comprises a data driver to transmit a data signal through a first transmission line of which one end is terminated; a reference voltage driver to transmit a reference voltage signal through a second transmission line of which one end is terminated; and a receiver to determine a logic state by comparing the data signal transmitted by the first transmission line with the reference voltage signal transmitted by the second transmission line. Accordingly, a high-speed bus interface circuit of the present invention can decrease a common mode noise, influence of ground bounce, an output voltage swing and a power consumption by simultaneously driving a data driver and a reference voltage driver in a memory interface using a transmission line being either single or parallel terminated to transmit to a receiver.

Description

This invention relates to a bus interface circuit in a semiconductor memory device. In particular, it relates to a bus interface circuit, which can transfer a data signal and a reference voltage signal to a receiver by simultaneously driving a data driver with a reference voltage driver in a bus interface using a transmission line whether it is a single or parallel terminated.DESCRIPTION OF THE RELATED PRIOR ARTA DRAM, which is used for the main memory and the video memory in a computer, requires a wide bandwidth to improve the performance of a system. To satisfy the condition of the bandwidth, study of the bus interface, through which a data signal is transmitted at high speed, should be considered. A TTL interface has been used for the last twenty years as the industry standard. However, the TTL interface causes problems such as power consumption, noise, signal reflection and ringing phenomenon in systems with speeds over 50 MHz. This is a limitation in communicating at high speed...

AI Technical Summary

Problems solved by technology

However, the TTL interface causes problems such as power consumption, noise, signal reflection and ringing phenomenon in systems with speeds over 50 MHz.

This is a limitation in communicating at high speed.

However, since the LVTTL interface causes various problems such as power consumption and noise, etc. similar to TTL interface in systems with speeds over 100 MHz, it is difficult to apply it to any system.

But there is limitation in decreasing voltage variation width caused by a poor common mode noise.

Hence, minimum voltage swing can be maintained to a desired margin but it becomes a limitation in improving high speed and low power characteristics of an interface.

Hence, there is a problem in that the EMI is increases in high-speed operation.

Images