9 results about "Ground bounce" patented technology

The invention relates to the technical field of electromagnetic compatibility (EMC) design of electronic circuits, in particular to a method suitable for a flow cytometer and capable of reducing interference of clock signals on EMC. The method comprises the steps that S100, clock circuit components are concentrated in a 5mm * 5mm area of the top layer of a PCB, routing is limited to a second layer through buried holes, and fundamental frequency is dynamically set; s200, laying copper in a key area for grounding, and adding a ground bounce suppression array to three layers; s300, arranging an upper ground copper layer and a lower ground copper layer by using a flexible circuit board; s400, covering the top circuit with a ferrite alloy cover, and welding and grounding; and S500, the flow velocity and the cell density are collected in real time, the clock frequency is dynamically adjusted, a frequency stabilization mechanism exists in an extreme scene, radiation is effectively reduced, and the detection precision and stability are improved. According to the method, the EMC interference of the clock signal of the flow cytometer is reduced from multiple dimensions of source inhibition, shielding protection, connection optimization and cooperative control.

A data driver circuit and a display device are discussed, which are capable of reducing peak current and improving ground bouncing by optimizing a spread time of a MUX stage based on the counted bit toggle value of the image data. The display device can include a display panel in which a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels, and a demultiplexer are disposed; a data driver circuit that supplies a data voltage corresponding to image data to a plurality of data channels; and a controller that controls the data driver circuit and supplies the image data to the data driver circuit. The demultiplexer includes a plurality of MUX stages and controls connection between the plurality of data channels and the plurality of data lines through switching operations of the plurality of MUX stages.

The application discloses an electromagnetic bandgap structure and a circuit board, and is applied to the field of high-frequency circuits.The electromagnetic bandgap structure comprises a center part, a signal connecting line connected with the center part and extending away from the center part, and metal wires located at the periphery of the center part, the metal wires being spaced apart from the signal connecting line, both ends of the metal wires being connected with the center part, and a shielding groove being formed between the metal wires and the center part.The electromagnetic bandgap structure provided by the application increases the noise suppression cutoff frequency depth, can effectively suppress the ground bounce effect of a power layer, and further reduces the effect of the ground bounce effect on signal quality and electromagnetic radiation; the shielding groove can avoid the diffusion of a signal interference source, so as to ensure the integrity of signal transmission.

The invention discloses a chip multi-station parallel consistency test method and device and a storage medium, and relates to the technical field of chips.The method comprises the steps that electrical parameters and heat engine parameters of a station and an adjacent station are collected and subjected to time domain alignment, and original feature vectors are generated; calculating an electric domain disturbance potential energy factor and a heat-engine coupling dispersion based on the calculation result; generating a chip collaborative damage index by using the automatic collaborative damage model; dynamically triggering an elastic phase translation mechanism according to a comparison result of the index and a risk threshold value; and generating an evaluation score in combination with a test result and updating model parameters in a closed-loop manner. The method effectively solves the problems of transient voltage drop and ground bounce noise interference of the shared power supply rail caused by random high-load action superposition of adjacent stations in the asynchronous parallel test.

Exemplary embodiments of this disclosure relate to a data driver circuit and a display device. More specifically, the display device may include: a display panel, in which multiple gate lines, multiple data lines, multiple sub-pixels, and a demultiplexer are disposed; a data driver circuit that provides data voltages corresponding to image data to multiple data channels; and a controller that controls the data driver circuit and provides image data to the data driver circuit. The demultiplexer includes multiple MUX stages, and the connection between the multiple data channels and multiple data lines is controlled by switching operations of the multiple MUX stages. The data driver circuit controls the length of at least one of a first extension time and a second extension time among multiple preset extension times of the multiple MUX stages based on bit switching counts of the image data. The data driver circuit and the display device can optimize the extension time of the MUX stages by using the counted bit switching values ​​of the image data to reduce peak current and improve ground bounce noise.

A gate-driving circuit for controlling a cascode power device to switch on or off while suppressing ground bounce has a gate-driving signal generator and a local power supply. The gate-driving signal generator, which receives an external control signal and accordingly generates a gate-driving signal to drive a gate of the cascode power device, is entirely powered by the local power supply. The local power supply is powered with raw electrical power received from an M point of the cascode power device such that the gate-driving circuit is self-powered without connecting to an external power supply. It avoids a need to install an isolation circuit for ground isolation between the external power supply and the cascode power device for suppressing ground bounce. Advantageously, elimination of the external power supply and isolation circuit leads to a simplified and more-compact design of the gate-driving circuit.

The present disclosure relates to a split input amplifier for protection from DC bias. Embodiments presented herein provide apparatuses and techniques to reduce direct current (DC) voltage bias between a transmitter and a receiver. Embodiments include a shared reference voltage signal generated by a reference voltage source. The receiver can include a first cell gain buffer that receives a reference voltage signal from the reference voltage source. The transmitter can be communicatively coupled to the receiver via one or more connections and can include a second cell gain buffer communicatively coupled to the first cell gain buffer via one of the connections. An amplifier (e.g., an operational amplifier) of the transmitter can include a plurality of positive inputs coupled to the second cell gain buffer and a bias tracker. The bias tracker can compensate for DC bias caused by at least power supply and / or ground bounce.

This disclosure provides a power control circuit and a chip. The power control circuit includes a node voltage generation module, a comparison module, and a control module. The node voltage generation module establishes a stable first internal node voltage based on the power port voltage and a stable second internal node voltage based on the internal circuit voltage. The comparison module compares the first internal node voltage with the power port voltage to obtain a first comparison signal, and compares the second internal node voltage with the power port voltage to obtain a second comparison signal. The control module controls the switching between the power port and the power supply terminal of the internal circuit based on the first and second comparison signals to prevent ground bounce noise from external power signals from entering the internal circuit, thereby improving chip stability. This power control circuit can prevent ground bounce noise from entering the internal circuit, thus improving chip stability, and can also reduce circuit complexity, thereby reducing chip area.