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Semiconductor device with staggered electrodes and increased wiring width

a technology of semiconductor devices and electrodes, applied in semiconductor devices, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problems of grand terminals and inability to use pads for terminals for large amounts of electric curren

Inactive Publication Date: 2006-05-23
LAPIS SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0008]An object of the present invention is to provide a novel and improved semiconductor device capable of widening the width of wiring for the outside electrode and embodying the wire bonding smoothly.
[0011]Since the present invention can achieve the width of wiring of the outside-line electrode connected to the internal circuit, which is wider than the conventional width of wiring, the outside-line electrode can be used as the one for a large amount of electric current, for example, an electric power supply. Further, since the electrode of the inside-line electrode and the electrode of the outside-line electrode are set apart each other, in recognizing the position of the electrode at the process of wire bonding, the adjacent electrode is not wrongly recognized.

Problems solved by technology

However, the pad electrode arranged conventionally has following problems:1. Since the wiring connected to the outside-line electrode is arranged to pass between the adjacent inside-line electrodes and the width of wiring has to be narrower than the interval between the inside-line electrodes, the pad electrode cannot be used for a terminal for a large amount of electric current and a grand terminal.2. In the wire bonding, the wiring mistake is caused in a few cases by the wrong recognition of the adjacent pad electrode for the wire-bonding pad electrode.3. The neighboring wires contact each other in a few cases in the wire bonding by arranging the outside-line electrode near the center of the inside pad electrode.

Method used

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  • Semiconductor device with staggered electrodes and increased wiring width
  • Semiconductor device with staggered electrodes and increased wiring width
  • Semiconductor device with staggered electrodes and increased wiring width

Examples

Experimental program
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first embodiment

First, the first embodiment will be described in reference to FIGS. 1 and 2. It is to be noted that FIG. 1 is a top plan view of the semiconductor device of this embodiment.

[0023]First, as shown in FIG. 1, an outside-line electrode 103, a central-line electrode 105 and an inside-line electrode 106 of a semiconductor pellet 101 have a staggered arrangement in three lines on the peripheral part 102 of a semiconductor pellet 101. The outside-line electrode is formed in a square shape or a rectangle shape in which the ratio of the sides is from 1 to 2. The central-line electrode configures a hexagonal electrode having a hypotenuse formed to cut two corners at predetermined degrees on the inside-line electrode side of the rough square shaped electrode. The inside-line electrode configures a hexagonal electrode having a hypotenuse formed to cut the two corners at predetermined degrees on the central-line electrode side of the rough square shaped electrode.

[0024]In addition, between the ce...

second embodiment

[0042]In the embodiment described above, a hexagonal electrode having a hypotenuse formed to cut the two corners facing each other of a basic rough square shaped electrode is introduced as a central electrode and an inside-line electrode. In this embodiment, an octagonal electrode having a hypotenuse formed to cut all of the four corners of a basic rough square shaped electrode is introduced as a central electrode and an inside-line electrode.

[0043]Next, the second embodiment will be described in reference to FIGS. 3 and 4. It is to be noted that FIG. 3 is a top plan view of the semiconductor device of the present invention.

[0044]First, as shown in FIG. 3, an outside-line electrode 203, a central-line electrode 205 and an inside-line electrode 206 of a semiconductor pellet 201 have a staggered arrangement in three lines on the peripheral part 202 of a semiconductor pellet 201. The outside-line electrode is formed in a square shape or a rectangle shape in which the ratio of the sides...

third embodiment

[0062]In the embodiment described above, the explanation is provided with regard to the configuration that a hexagonal or an octagonal electrode is introduced as a central electrode and an inside-line electrode. In this embodiment, an electrode with a two-layer structure configuring an octagonal lower electrode on the lower layer and a square upper electrode on the upper layer is introduced as a central electrode and an inside-line electrode.

[0063]Next, the third embodiment will be described in reference to the FIGS. 5, 6 and 7. It is to be noted that FIG. 5 is a top plan view of the semiconductor device of the present invention.

[0064]First, as shown in FIG. 5, an outside-line electrode 303, a central-line electrode 305 and an inside-line electrode 306 of a semiconductor pellet 301 have a staggered arrangement in three lines on the peripheral part 302 of a semiconductor pellet 301. The outside-line electrode is formed in a square shape or a rectangle shape in which the ratio of the ...

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Abstract

A semiconductor device having electrodes formed along a peripheral part thereof in a staggered arrangement of lines including inside-line, central-line and outside-line electrodes. The inside-line electrodes are octagonal or hexagonal shaped with hypotenuses on the central-line electrode and the pellet sides thereof. The central-line electrodes are octagonal or correspondingly hexagonal shaped with hypotenuses on the inside-line and outside-line electrode sides thereof. The maximum width of outside-line electrode wires between the hypotenuses of adjacent inside-line and central-line electrodes depends on the distance between centers of the inside-line and central-line electrodes, minimum lengths of the inside-line and central-line electrodes and electrode protective film, and the necessary minimum conductor interval between the central-line and inside-line electrodes. The position and form of the central-line and inside-line electrodes are determinable based on the given relationship and the necessary value of current.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This is a divisional application of application Ser. No. 10 / 440,271, filed May 19, 2003, now U.S. Pat. No. 6,798,077, which is a divisional application of Ser. No. 09 / 956,123, filed Sep. 20, 2001, now U.S. Pat. No. 6,590,296, which are hereby incorporated by reference in their entirety for all purposes.BACKGROUND OF THE INVENTION[0002]The present invention relates to a semiconductor device and more particularly to a semiconductor device with staggered arrangement in three lines on the peripheral part of the surface of a semiconductor pellet.DESCRIPTION OF THE RELATED ART[0003]FIGS. 8 and 9 show the configuration of an electrode with staggered arrangement on the peripheral part of the surface of a semiconductor pellet in conventional art. FIG. 8 shows inside and outside electrodes 402 in two lines with staggered arrangement on the peripheral part of a semiconductor pellet 401. As shown in FIG. 9, an inside-line electrode 403 has a square s...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L23/48H01L23/52H01L29/40H01L21/60H01L23/528
CPCH01L23/528H01L24/06H01L24/05H01L2224/0603H01L2224/05552H01L2224/05599H01L2224/06153H01L2224/4943H01L2924/01004H01L2924/01005H01L2924/01082H01L2924/01033H01L24/49H01L2924/00014H01L2224/02166H01L2224/06051H01L2224/05553H01L2924/00012H01L2224/05554H01L24/48H01L2224/05093H01L2224/45099H01L2224/85399H01L2224/023H01L2224/45015H01L2924/207H01L2924/0001
Inventor NAKAMURA, AKIO
Owner LAPIS SEMICON CO LTD